PtinyOS: Simulating TinyOS in Ptolemy II

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PtinyOS Simulating TinyOS in Ptolemy II

• Elaine Cheong
• Dec 10, 2004
• EE290N Project Presentation

(Initial NC code generator by Yang Zhao and
Edward Lee)
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Motivation

• Infrastructure for sensor network research
• VisualSense
• Pro provides network level simulation
• Con lacks real code simulation
• TinyOS
• Pro provides interrupt level simulation
• Con lacks detailed environment models and
  heterogenous node simulation

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VisualSense
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TinyViz/SimDriver/Tython
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nesC
TestTinyViz.nc
includes TestTinyViz configuration TestTinyViz
implementation components Main,
TestTinyVizM, TimerC, RandomLFSR,
GenericComm as Comm Main.StdControl -gt Comm
Main.StdControl -gt TimerC Main.StdControl -gt
TestTinyVizM TestTinyVizM.Random -gt
RandomLFSR TestTinyVizM.Timer -gt
TimerC.Timerunique("Timer")
TestTinyVizM.SendMsg -gt Comm.SendMsgAM_TESTTINYVI
Z TestTinyVizM.ReceiveMsg -gt
Comm.ReceiveMsgAM_TESTTINYVIZ
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TinyOS
celaine/tos/apps/TestTinyViz build/pc/main.exe
1 SIM EEPROM system initialized. SIM event
queue initialized. SIM Random seed is
783860 SIM Initializing sockets SIM Created
server socket listening on port 10584. SIM
Created server socket listening on port
10585. SIM eventAcceptThread running. SIM
commandReadThread running. SIM Time for mote 0
initialized to 33403762. 0 BOOT Scheduling for
boot at 008.35094050. 0 Popping event for mote
0 with time 008.35094050. 0 Setting
TOS_LOCAL_ADDRESS to 0 0 BOOT Mote booting at
time 008.35094050. 0 CLOCK Setting clock rate
to interval 231, scale 3 0 malloc data entry for
clock event 0x812b4b0 0 UART initialized. 0
RANDOM_LFSR initialized. 0 malloc channel mon
event. 0 malloc Channel Mon event data. 0 AM
Module initialized 0 CLOCK Setting clock rate
to interval 231, scale 3 0 malloc data entry for
clock event 0x812b528 0 RANDOM_LFSR
initialized. 0 UART started.
nesC compiler
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PtinyOS

• Editor
• Front end to nesC compiler
• Simulator (interface to TOSSIM)
• Simulator (interface to other Ptolemy II domains)

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PtinyOS as Editor
configuration CntToLeds implementation
components Main, TimerC, IntToLeds, Counter
Main.StdControl -gt TimerC.StdControl
Counter.Timer -gt TimerC.Timerunique("Timer")
Counter.IntOutput -gt IntToLeds.IntOutput
Main.StdControl -gt IntToLeds.StdControl
Main.StdControl -gt Counter.StdControl
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PtinyOS as Simulator
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PtinyOS Director

• preinitialize()
• Generate .nc file(s) and makefile
• Call make
• Compile .nc code with nesC compiler
• Create shared library (.so or .dll)
• initialize()
• Load shared library
• Call TOSSIM main()
• Boot virtual mote
• fire()
• Process all events with same timestamp
• Process all TinyOS tasks in task queue

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Related Work

• GRATIS II
• TinyViz
• ATEMU
• Avrora
• Em (EMTOS)

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Future Work

• Single node radio simulation
• Multiple node simulation
• Homogenous
• Heterogeneous
• Integration with VisualSense
• TinyGALS
• Distributed programming for sensor networks

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Demo