High Level Simulation of Complex MixedSignal Circuits

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High Level Simulation ofComplex Mixed-Signal
Circuits
Yves Leduc, Texas Instruments France
y-leduc_at_ti.com
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Modeling the Reality
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• The Top-Down and Bottom-Up processes
• The purpose of the Behavioral Modeling
• Methodology
• Solution to typical problems
• Behavioral modeling of Asynchronous Mixed Signal
  Modules
• an example

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System, Specifications
Concept
TOP-DOWN.. Modules of ..BOTTOM-UP
Cells
Detail
Enablers, Know-How
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High Level Description
Behavior of Modules Functionality of Cells
design
Electrical Description
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• Lets open the door of the

TOP-DOWN Methodology and the High
LevelBehavioral Modeling
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• We use High Level Behavioral Models to
• Divide to Conquer
• Refine specifications
• Support creativity
• Verify concepts
• Assess risks
• Verify testability

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• And to..
• Contribute to the what-if analysis
• Measure the gap between understanding and reality
• Provide a model back to customer
• Formalize the partitioning
• Speed-up the simulations

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• We mainly use the behavioral modeling to
• MANAGE THE COMPLEXITY
• It is therefore veryimportant to be organized.

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• Methodology
• Identify the method and the tool(s) to analyze
  the system!
• Select the proper simulator.
• Build models, write netlists.
• Install a back annotation flow.

This is often under-evaluated , causing numerous
and costly reworks. If the tool is properly
selected, you could hope to succeed!
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• Which Method, which Tool?
• Periodic sampling?
• Signal Domain?
• Time Domain? Frequency Domain?
• ..?

Model What Signal Analysis domain ALU
events bit time Digital filter
periodic sampling bit frequency Analog filter
? voltage time, frequency PLL
? ? frequency Phase Modulation ? ?
? ..
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VHDL, ..
opcode
clock
n
m
ALU
n
Sampling at event rate Bit to Bit Comparison in
the time domain Timing analysis ..
A SOLUTION Gate level model Event driven
simulator
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Saber () , SPICE (), ..
Variable time step Time domain analysis (Frequency
domain analysis) ..
A SOLUTION Device level model Electrical
Simulator
() Avant! () UC Berkeley
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SWITCAP (), ..
Sampling at clock filter rate Transfer function
in the frequency domain Histograms in the time
domain ..
A SOLUTION Primitive level model Cycle based
simulator
() Columbia Integrated Systems Laboratory.
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Sampling at clock filter rate Transfer function
in the frequency domain Histograms in the time
domain ..
A SOLUTION Module level model Cycle based
simulator
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What about mixing everything together?
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clock
Oversampling
Digital Module and SWC Filter
Modeling
Continuous Time Domain Analysis Transfer function
in the frequency domain ..
A SOLUTION Module level model Cycle based
simulator Specific Modeling
() Wolfram Research, Inc.
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(an example)
Sampled domain
Continuous domain
OSR Fs
Fs
Analytic method Solve differential
equations, use cycle based simulator.
out in (dout-in)exp(-1.0/tauFs) dout
delay(out)
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(an example)
Sampled domain
Sampled Domain
Continuous domain
Fs
Fs
This is a variant of the previous example. Same
methods, same effort. Only analysis
differs. e.g. a SWC integrator with a limited
bandwidth, slew rate, ..
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(an example)
Sampled domain
Continuous domain
Tchebychev Active Filter
Fs
OSRFs
Numerical method Inverse Laplace
transform, use cycle based simulator.
H(s)
In
Out
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Both methods imply fairly linear transfer
functions and synchronous operations. This is not
often so simple Complex linear transfer
functions are definitively not obvious to
describe but non linear ones could be simply
awful! Prefer cycle based simulator for
synchronous operations. Be prepared to crunch
algorithms. And be creative.. It helps!
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These methods cover a large part of the mixed
signal development. Use them to design, to
check the functionality, to verify the
performances, to check your level of
understanding, .. Do not forget to estimate
yield, testability .. Take time to balance the
risks .. Typical examples SD modulators,
converters, filters, .. NEVER START A MIXED
SIGNAL DEVELOPMENT BEFORE A DETAILED BEHAVIORAL
ANALYSIS!
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Unhappily, life is not so simple!
Previous examples are all based on synchronous
operations. What about Asynchronous Events in
Mixed Signal modules?
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No satisfactory generic solution exists for the
behavioral simulation of large mixed signals
asynchronous circuits. Still.. We need to find
solutionsto practical problems.
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An example
VCO
PFD
U
D
Clock Slicer
FM Modulator
Ref_Clock
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VCO
PFD
Out
Oversampling
Computation and signal are asynchronous
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Synchronously to simulation clock, output phase
in the time domain, determine next asynchronous
event if any, compute PFD decision, compute
accordingly signal.
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Modeling the analog core
Inverse Laplace Transform in asynchronous
operations and some hard work...
VCO
PFD
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Work on going...