Chapter 4 Processor Technology and Architecture

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Chapter 4Processor Technology and Architecture
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Chapter Goals
Chapter 4
Systems Architecture

• Describe CPU instruction and execution cycles.
• Explain how primitive CPU instructions are
  combined to form complex processing operations.
• Describe the key CPU design features, including
  instruction format, word size, and clock rate.

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Chapter Goals
Chapter 4
Systems Architecture

• Describe the function of general-purpose and
  special-purpose registers.
• Compare and contrast CISC and RISC CPUs.
• Describe the principles and limitations of
  semiconductor-based microprocessors.

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Chapter Topics
Chapter 4
Systems Architecture

• CPU Operations
• CPU Instructions
• CPU Components
• CPU Implementation
• Future Trends for processors

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Chapter Topics
Chapter 4
Systems Architecture
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CPU Operation
Chapter 4
Systems Architecture

• Central Processing Unit Components
• Control Unit
• Arithmetic and Logic Unit
• Registers

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CPU Operation
Chapter 4
Systems Architecture

• Control Unit moves data and instructions
  between main memory and registers.
• Arithmetic and Logic Unit performs all
  computation and comparison operations.
• Registers storage locations that hold inputs
  and outputs for the ALU.

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CPU Operation
Chapter 4
Systems Architecture
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CPU Operation
Chapter 4
Systems Architecture

• Actions performed by the CPU
• Fetch cycle data inputs are prepared for
  transportation into data groups.
• Execution cycle the transformation takes place
  and data output is stored.

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CPU Operation
Chapter 4
Systems Architecture
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Instructions and Instruction Sets
Chapter 4
Systems Architecture

• Parts of an instruction
• Characteristics of an Instruction
• Data movement instruction
• Data transformation instructions
• Sequence control instructions
• Complex processing operations

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Instructions and Instruction Sets
Chapter 4
Systems Architecture

• Parts of an instruction
• Op code
• Operands

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Instructions and Instruction Sets
Chapter 4
Systems Architecture

• Instruction a command to the CPU to perform one
  of its primitive processing functions.
• Op Code the unique binary number of the
  instruction.
• Operand groups of bits that hold the input
  values for the instruction.

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Instructions and Instruction Sets
Chapter 4
Systems Architecture
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Instructions and Instruction Sets
Chapter 4
Systems Architecture

• Instruction Set collection of instructions
  that a CPU can process.

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Instructions and Instruction Sets
Chapter 4
Systems Architecture

• Characteristics of an Instruction Set
• Size of the instruction set
• Size of the individual instructions, op codes,
  and operands
• Supported data types
• Number and complexity of processing operations
  implemented as individual instructions

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Data Movement
Chapter 4
Systems Architecture

• Move Instruction
• Copies data bits to storage locations
• Transfers data from main memory into registers
  (load instruction)
• Transfers data from registers to primary storage
  (store instruction)

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Data Transformation
Chapter 4
Systems Architecture

• Primitive Data Transformation Instructions
• NOT
• AND
• OR
• XOR
• ADD
• SHIFT

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Data Transformation
Chapter 4
Systems Architecture
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NOT Instruction
Chapter 4
Systems Architecture

• The NOT instruction transforms the boolean
  value true into false and the value false into
  true.
• NOT 0 1
• NOT 1 0

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AND Instruction
Chapter 4
Systems Architecture

• The AND instruction generates the result true
  if both of its data inputs are true.
• 0 AND 0 0
• 1 AND 0 0
• 0 AND 1 0
• 1 AND 1 1

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Inclusive OR Instruction
Chapter 4
Systems Architecture

• The Inclusive OR instruction generates the
  value true if either or both data inputs are
  true.
• 0 OR 0 0
• 1 OR 0 1
• 0 OR 1 1
• 1 OR 1 1

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Exclusive OR Instruction
Chapter 4
Systems Architecture

• The Exclusive OR Instruction (XOR) generates
  the value true if either, but not both, data
  inputs are true.
• 0 XOR 0 0
• 1 XOR 0 1
• 0 XOR 1 1
• 1 XOR 1 0

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ADD Instruction
Chapter 4
Systems Architecture

• The ADD instruction accepts two numeric inputs
  and produces their arithmetic sum.
• 0 0 0
• 1 0 1
• 0 1 1
• 1 1 10

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SHIFT Instruction
Chapter 4
Systems Architecture

• The Shift instruction moves bit strings to the
  left or the right.

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Logical Shift Instruction
Chapter 4
Systems Architecture

• The Logical Shift instruction is typically
  used to extract a single bit from a bit string.

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Arithmetic Shift Instruction
Chapter 4
Systems Architecture

• The Arithmetic Shift instruction performs
  multiplication or division.
• Multiplication shifting one bit to the left,
  multiplies the value by 2.
• Division shifting one bit to the right,
  divides the value by 2.

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Arithmetic Shift Instruction
Chapter 4
Systems Architecture
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Sequence Control
Chapter 4
Systems Architecture

• The Branch instruction causes the process to
  depart from sequential instruction order.
• Types of Branch instructions
• Unconditional Branch
• Conditional Branch

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Sequence Control
Chapter 4
Systems Architecture

• The Unconditional Branch causes the processor
  to always depart from the normal sequence.
• The Conditional Branch occurs only if a
  specified condition is met.

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Halt Instruction
Chapter 4
Systems Architecture

• The Halt instruction suspends the normal flow
  of instruction execution in the current program.

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Complex Processing Operations
Chapter 4
Systems Architecture

• Complex processing operations can be performed
  by combining the simpler operations.

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Complex Operations
Chapter 4
Systems Architecture
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Complex Operations
Chapter 4
Systems Architecture
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Instruction Format
Chapter 4
Systems Architecture

• An instruction format is a template that
  specifies the number of operands and the position
  and length of the op code and operands.

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Instruction Format
Chapter 4
Systems Architecture
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Instruction Format
Chapter 4
Systems Architecture
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Instruction Length
Chapter 4
Systems Architecture

• Fixed instruction length simplify the
  instruction-fetching processes implemented with
  the control unit.
• Variable instruction length the amount by which
  the instruction pointer is incremented after the
  fetch is the length of the most recently fetched
  instruction.

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Reduced Instruction Set Computing
Chapter 4
Systems Architecture

• Reduced Instruction Set Computing (RISC) -
  the absence of all, but not all, complex
  instructions in the instruction set.

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Complex Instruction Set Computing
Chapter 4
Systems Architecture

• Complex Instruction Set Computing (CISC) -
  uses instructions that do more work per
  instruction. As a result, programs require less
  memory, and complex operations executed more
  quickly.

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Clock Rate
Chapter 4
Systems Architecture

• Clock Rate the frequency at which the system
  clock generates timing pulses.
• The rate are measured in Hertz (Hz) one cycle
  per second.

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CPU Registers
Chapter 4
Systems Architecture

• Register Types
• General-purpose
• Special-purpose

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General-purpose Registers
Chapter 4
Systems Architecture

• Used by currently executing programs.
• Hold intermediate results.
• Hold data values.

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Special-purpose Registers
Chapter 4
Systems Architecture

• Used by the CPU for a specific purpose.
• Special-purpose registers Instruction register,
  Instruction pointer, Program status word.

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Special-purpose Registers
Chapter 4
Systems Architecture

• Instruction register stores the instruction the
  control unit fetches from memory.
• Instruction pointer stores the location of the
  next instruction to be fetched by the
• Program status word stores data that describes
  the status of the CPU and currently executing
  program.

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Word Size
Chapter 4
Systems Architecture

• Word unit of data that contains a fixed number
  of bytes or bits. The amount of data that a CPU
  processes at one time.

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The Physical CPU
Chapter 4
Systems Architecture

• Switches and Gates
• Electrical Properties
• Processor Fabrication

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The Physical CPU
Chapter 4
Systems Architecture

• Switches and Gates the basic building blocks
  of computer processing circuits are electrical
  gates.
• Basic processing functions on binary digits
  are performed with the logical functions (AND,
  OR, XOR, and NOT)

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The Physical CPU
Chapter 4
Systems Architecture
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The Physical CPU
Chapter 4
Systems Architecture

• More complex processing functions require more
  complicated arrangements of gates.
• A full-adder and half-address can be formed
  using the basic gates.

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The Physical CPU
Chapter 4
Systems Architecture
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Electrical Properties
Chapter 4
Systems Architecture

• Conductivity
• Resistance
• Heat
• Speed of Circuit Length

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Electrical Properties
Chapter 4
Systems Architecture

• Conductivity the ability of an element or
  substance to enable electron flow.
• Resistance the loss of electrical power that
  occurs within a conductor.

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Electrical Properties
Chapter 4
Systems Architecture

• Heat the negative effects of heat on
  electrical conductivity are damage to the
  conductor and changes in the inherent resistance
  of the conductor.
• Heat Sink an object specifically designed to
  absorb heat and rapidly dissipate it using air or
  water movement.

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Electrical Properties
Chapter 4
Systems Architecture
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Electrical Properties
Chapter 4
Systems Architecture

• Speed and Circuit Length Electrons move
  through the wires and switches of a processing
  circuit at the speed of light (180,000 miles per
  second).
• The time required is a function of the length of
  the circuit and the speed of light.

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Processor Fabrication
Chapter 4
Systems Architecture

• Transistors and Integrated Circuits
• Microchips and Microprocessors

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Processor Fabrication
Chapter 4
Systems Architecture

• Transistors and Integrated Circuits
  transistors are made of semiconductor material
  that has been treated with chemical impurities to
  enhance the semiconducting effects.
• Integrated Circuit implements several
  transistors and their interconnections on a
  single chip.

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Processor Fabrication
Chapter 4
Systems Architecture

• Microchips and Microprocessors
• A microprocessor is a microchip that contains
  all of the circuits and connections that
  implement a CPU.

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Processor Fabrication
Chapter 4
Systems Architecture
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Current Technology Capabilities and Limitations
Chapter 4
Systems Architecture

• Moores Law
• Rocks Law

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Current Technology Capabilities and Limitations
Chapter 4
Systems Architecture

• Moores Law observed that the rate of
  increase in transistor density on microchips had
  increased steadily, roughly doubling every 18 to
  24 months.

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Chapter 4
Systems Architecture
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Current Technology Capabilities and Limitations
Chapter 4
Systems Architecture

• Rocks Law states that the cost of
  fabrication facilities for the latest generation
  of chips has doubled every four years.

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Chapter 4
Systems Architecture
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Future Trends
Chapter 4
Systems Architecture

• Optical Processing
• Electro-Optical Processing
• Quantum Processing

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Future Trends
Chapter 4
Systems Architecture

• Optical Processing
• Could eliminate interconnection and simplify
  fabrication problems.
• It is possible to connect fiber optic devices
  without wires.

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Future Trends
Chapter 4
Systems Architecture

• Electro-Optical Processing
• Can become the interface between semiconductor
  processors and purely optical memory and storage
  devices.
• Can be used to fabricate conventional
  semiconductors.

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Future Trends
Chapter 4
Systems Architecture

• Quantum Processing
• Uses quantum states to simultaneously encode two
  bits, called a qubit.
• Uses quantum processing devices to perform
  computations.

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Summary
Chapter 4
Systems Architecture

• The CPU continuously alternates between the
  instruction, or fetch cycle and execution cycle.
• Primitive CPU instructions can be classified into
  three types
• Data movement
• Data transformation
• Sequence control

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Summary
Chapter 4
Systems Architecture

• An instruction formation is a template describing
  the op code position and the length and the
  position, type and length of each operand.
• The CPU clock rate is the number of instruction
  and execution cycles potentially available in a
  fixed time interval.

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Summary
Chapter 4
Systems Architecture

• CPU registers are of two types
• General purpose
• Special purpose
• Word size is the number of bits that a CPU can
  process simultaneously.
• CPUs are electrical devices implemented as
  silicon-based microprocessors.

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Systems Architecture
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Systems Architecture
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Systems Architecture
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Chapter 4
Systems Architecture