RECIPES FOR PLASMA

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RECIPES FOR PLASMA ATOMIC LAYER ETCHING Ankur
Agarwala) and Mark J. Kushnerb) a)Department of
Chemical and Biomolecular Engineering University
of Illinois, Urbana, IL 61801, USA aagarwl3_at_uiuc.e
du b)Department of Electrical and Computer
Engineering Iowa State University, Ames, IA
50011, USA mjk_at_iastate.edu http//uigelz.ece.iast
ate.edu 34th IEEE ICOPS, June 2007
Work supported by the SRC and NSF
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AGENDA

• Atomic Layer Processing
• Plasma Atomic Layer Etching (PALE)
• Non-sinusoidal Bias Waveforms
• Tailored Bias PALE Recipes
• SiO2 using Ar/c-C4F8
• Self-aligned contacts
• Concluding Remarks

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ANKUR_ICOPS07_Agenda
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ATOMIC LAYER PROCESSING

• Advanced microelectronics structures require
  extreme selectivity in etching materials with nm
  resolution.
• Atomic layer plasma processing may allow for this
  level of control.
• Current techniques employ specialized ion beam
  equipment.
• The high cost of atomic layer processing
  challenges its use.
• Plasma Atomic Layer Etching (PALE) is potentially
  an economic alternative.

• Double Gate MOSFET

• Tri-gate MOSFET

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Refs AIST, Japan Intel Corporation
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PLASMA ATOMIC LAYER ETCHING (PALE)

• In PALE etching proceeds monolayer by monolayer
  in a cyclic, self limiting process.
• First step Top monolayer is passivated in
  non-etching plasma.
• Passivation makes top layer more easily etched
  compared to sub-layers.
• Second step Remove top layer (self limiting).
• Exceeding threshold energy results in etching
  beyond top layer.

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PLASMA ATOMIC LAYER ETCHING (PALE)

• PALE has been computationally and experimentally
  investigated using conventional plasma equipment.
• Inductively coupled plasma (ICP)
• Capacitively coupled plasma (CCP)
• Since the equipment is already in fabrication
  facilities, no additional integration costs are
  incurred.
• The low speed of PALE processes hinder its
  integration into production line.
• Speed can be increased but only at the cost of
  losing control of CD (critical dimensions) or
  damaging material interfaces.

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INCREASING SPEED OF PALE HOW?

• Conventional PALE
• Different gas mixtures for each step.
• Although self-limiting, purge steps increase
  process time.
• Tailored bias PALE
• Create nearly mono-energetic ion distribution.
• Control ion energies via changes in voltage
  amplitude.
• Single gas mixture for both steps eliminates
  purge and reduces time.

• Conventional PALE

• Tailored Bias PALE

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NON-SINUSOIDAL BIAS WAVEFORMS IEADs

• Custom waveform produces nearly constant sheath
  potential resulting in narrow IEAD.
• Peak energy of IEAD is controlled by amplitude.
• IED broadens at higher biases due to thickening
  of sheath and longer transit times.

• ? 10 Vp-p 200 V

Iowa State University Optical and Discharge
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Ref A. Agarwal and M.J. Kushner, J. Vac. Sci.
Technol. A, 23, 1440 (2005)
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HYBRID PLASMA EQUIPMENT MODEL (HPEM)

• Electromagnetics Module Antenna generated
  electric and magnetic fields
• Electron Energy Transport Module Beam and bulk
  generated sources and transport coefficients.
• Fluid Kinetics Module Electron and Heavy
  Particle Transport, Poissons equation
• Plasma Chemistry Monte Carlo Module
• Ion and Neutral Energy and Angular Distributions
• Fluxes for feature profile model

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MONTE CARLO FEATURE PROFILE MODEL

• Monte Carlo techniques address plasma surface
  interactions and evolution of surface morphology
  and profiles.
• Inputs
• Initial material mesh
• Surface reaction mechanism
• Ion and neutral energy and angular distributions
• Fluxes at selected wafer locations.
• Fluxes and distributions from equipment scale
  model (HPEM)

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ANKUR_ICOPS07_07
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FLUOROCARBON PLASMA ETCHING OF SiO2/Si

• CFx radicals produce polymeric passivation layers
  which regulate delivery of precursors and
  activation energy.
• Chemisorption of CFx produces a complex at the
  oxide-polymer interface
• Low energy ion activation of the complex produces
  polymer.
• Polymer complex sputtered by energetic ions ?
  etching.
• As SiO2 consumes the polymer, thicker layers on
  Si slow etch rates enabling selectivity.

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MAIN ETCH-PALE FOR VERY HIGH ASPECT RATIO
FEATURES

• PALE will always be slow compared to conventional
  etching.
• Selectivity of PALE is only needed at end of etch
  at material interface.
• Combine
• Rapid main etch to reach material interface
• PALE to clear feature with high selectivity.
• Feature to be investigated is SiO2-over-Si trench
  with an aspect ratio of 110.

• 101 Trench

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Ar/c-C4F8 ICP FOR SiO2 ETCHING

• Test system is inductively coupled plasma with 5
  MHz biased substrate.
• Ar/C4F8 75/25, 100 sccm, 15 mTorr, 500 W ICP
• Main etch is conventional sinusoidal waveform.
• PALE uses tailored bias waveform
• Passivate 50 V (peak-to-peak)
• Etch 100 V (peak-to-peak)

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MAIN ETCH OF SiO2-over-Si

• Main etch performed using a sinusoidal bias
  waveform.
• Micro-trenching at sides of feature due to
  specular reflection off walls.
• Central SiO2 remains when underlying Si is
  exposed.
• Significant etching into Si during over-etch to
  clear feature.
• Ar/C4F8 75/25, 100 sccm, 15 mTorr, 500 W, 100 V
  at 5 MHz

Aspect Ratio 110
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ANIMATION SLIDE-GIF
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Ar/c-C4F8 TAILORED BIAS PALE IEADs

• PALE of SiO2 using ICP Ar/C4F8 with variable
  bias.
• Step 1
• Vp-p 50 V
• Passivate single layer with SiO2CxFy
• Low ion energies to reduce etching.
• Step 2
• Vp-p 100 V
• Etch/Sputter SiO2CxFy layer.
• Above threshold ion energies.
• Narrow IEADs enable discrimination between
  threshold energies of undelying SiO2 and polymer
  complex.
• Ar/C4F8 75/25, 100 sccm, 15 mTorr, 500 W

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SiO2-over-Si PALE vs CONVENTIONAL ETCH
SiO2
Si

• 5 cycles of PALE

• Conventional Etching

• Narrow IEAD enables etching of rough initial
  profile at bottom.
• Redeposition of etched products and polymer cover
  exposed Si and sidewall avoids notching and
  damage.
• High speeds ( 4 ML/cycle) with high etch
  selectivity.

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? 1 cell 3 Å
ANIMATION SLIDE-GIF
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PALE ROUGHNESS vs STEP 2 ION ENERGY

• Speed of PALE can be increased via change in ion
  energies.
• At high ion energies, distinction between
  threshold energies is lost.
• Final etch profile is rough.
• Already exposed underlying Si vulnerable at high
  ion energy.
• Surface roughness scales linearly with ion
  energies.

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PALE ETCH RATE vs STEP 2 ION ENERGY

• Number of PALE cycles required to clear feature
  decrease with increasing ion energy.
• Etch rate saturates at high ion energies due to
  the rough initial feature profile.
• Trade-off between high etching rates and
  selectivity.
• Etching of already exposed underlying Si leads to
  roughness.

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PALE CONVENTIONAL vs TAILORED BIAS
Plasma
SiO2
Si

• Tailored 5 cycles

• Conventional 20 cycles

• Conventional PALE scheme utilizes 20 cycles.
• High speeds ( 3-4 ML/cycle) and extreme
  selectivity of PALE enable fast etching of
  self-aligned contacts.
• Final etch profile is smooth even at high etching
  rates.

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? 1 cell 3 Å
ANIMATION SLIDE-GIF
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CONCLUDING REMARKS

• Atomic layer control of etch processes will be
  critical for 32 nm node devices.
• PALE using conventional plasma equipment makes
  for an more economic processes.
• Slow etching rates of conventional PALE need to
  be optimized trade-off between high selectivity
  and etch rate
• PALE of SiO2 in Ar/c-C4F8 plasma investigated
  using custom bias waveforms,
• Non-sinusoidal bias waveforms enable
• Precision control of IEADs
• Elimination of purge step to increase process
  speeds
• High selectivity at high etching rates ( 4
  ML/cycle)

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