Title: ACA Phase 2
1Advanced Computer Architecture
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2Our Work
Victim Cache for Filter Cache Energy-aware
Filter Cache Architecture for Multicore
Processors , 2010
3Filter Cache Architecture
- increases the execution time
- 2.7 (single-core), 6.9 (2- cores), 7.4
(4-cores), - 7.6 (8-cores), 7.9 (16-cores)
- Reduces the energy consumption
- 12.9 (single-core), 9.9 (2-cores), 9.2
(4-cores), - 9.0 (8-cores), 8.9 (16-cores)
4Victim Cache Architecture
- increases the execution time
- 3.7 on Average
- Reduces the energy consumption
- 8.6 on average
5Our Work
or
Double Size Filter Cache DFilter cache 1 KB
Victim Cache for Filter Cache Filter cache 512
B Victim cache 512 B
6Our Work
- Reduce Power of Instruction Cache in Multicore
processors - multicore FrameWork
- Benchmark
- Power Tools
-
7- First Phase
- - SimpleScalar
- -Extension Multiprocessor Enhancements of the
SimpleScalar Tool Set - Spec2000 Single-thread benchmark
- Cacti 3.0
- Second Phase
- Multi2Sim A Simulation Framework to Evaluate
Multicore Multithreaded Processors 2007 - Configurable memory hierarchy, cache coherence
- ParMibench An Open-Source Benchmark for
Embedded Multiprocessor Systems 2010 - - Cacti 6.5
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9Our Work
Functional Unit 4 integer ALU, 4 FP ALU , 1 int Mul/Div , 1 FP Mul/Div
Traditional Cache L1 Ins 32KB , L1 Data 32KB 4-way, 32bytes lines L2 128KB
Filter Cache 512B Fully Associative, 1 Cycle Latency
Double Size Filter Cache 1KB, Fully Associative, 1 Cycle Latency
Victim Cache for Filter Cache Filter Cache 512B , Victim Cache 512B , Fully Associative, 1 Cycle Latency
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1 Core 2 Core 4 Core
Traditional Cache
Filter Cache
Double Filter Cache
Victim for Filter Cache
12 Run for each Benchmark !
10Result
Susan.Smoothing
11Result
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12Result
SearchString
13References
- 1 Y.J.Park, H.J.Choi, C.H. Kim, J.M. Kim,
Energy-aware Filter Cache Architecture for
Multicore Processors , 2010 - 2 J. Kin, M. Gupta, and W. Mangione-Smith, The
Filter Cache An Energy Efficient Memory
Structure, Proceedings of the International
Symposium on Microarchitecture, pp. 184-193,
1997. - 3 N. P. Jouppi, Improving Direct-Mapped Cache
Performance by the Addition of a Small
Fully-Associative Cache and Prefetch Buffers,
Proceedings of 17th Annual International
Symposium on Computer Architecture, pp. 364-373,
1990. - 4 Multiprocessor Enhancements of the
SimpleScalar Tool Set, Naraig Manjikian , 2001 - 5 ParMiBench - An Open-Source Benchmark for
Embedded Multiprocessor Systems , Syed Muhammad
Zeeshan Iqbal, Yuchen Liang, and Hakan Grahn ,
2010 - 6 Multi2Sim A Simulation Framework to Evaluate
Multicore-Multithreaded Processors, R. Ubal and
J. Sahuquillo and S. Petit and P. L\'opez , 2007 - 7 CACTI 6.0 A Tool to Model Large Caches ,
Muralimanohar, Naveen Balasubramonian, Rajeev
Jouppi, Norman P. , 2009