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String instructions

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Title: String instructions


1
String instructions
2
MOVS (MOVe String)
3
MOVS (MOVe String) Contd.
4
MOVS (MOVe String) Contd.
5
Use of REP prefix and MOVSB
6
CMPS (CoMPare Strings)
7
CMPS Contd.
8
CMPS Contd.
9
CMPS Contd.
10
CMPS Contd.
11
CMPS Contd.
12
STOS (STOre String) instruction
13
STOS Contd.
14
STOS Contd.
15
STOS Contd.
16
LODS (LOaD String) instruction
17
LODS Contd.
18
LODS Contd.
19
LODS Contd.
20
SCAS (SCAn String) instruction
21
SCAS Contd.
22
SCAS Contd.
23
SCAS Contd.
24
SCAS Contd.
25
SCAS Contd.
26
Intel 8255 PPI
27
Intel 8255 PPI
Chip Select Circuit
A7
M/IO
28
8255 PPI contd.
29
8255 PPI Contd.
30
8255 PPI Contd.
31
8255 PPI Contd.
32
8255 PPI Contd.
33
8255 PPI Contd.
34
8255 Handshake signals
35
8255 Handshake signals Contd.
36
8255 Contd.
37
8255 MD Control word
38
8255 MD Control word Contd.
39
8255 MD Control word Contd.
40
8255 MD Control word Contd.
41
8255 PCBSR Control word
42
8255 PCBSR Control word contd.
43
8255 PCBSR Control word contd.
44
8255 PCBSR Control word contd.
45
8255 Mode1 operation
46
Handshake Interrupt i/p port
For Port A as handshake interrupt input
port INTA is PC3 STBA is PC4 IBFA is PC5
STBB (PC2)
47
Handshake Interrupt i/p port
48
Handshake interrupt i/p port
When i/p device has data to send it checks if IBF
(input buffer full) signal is 0. If 0, it sends
data on PB7-0 and activates STB (Strobe) signal.
STB is active low. When STB goes high, the
data enters the port and IBF gets activated. If
the Port interrupt is enabled, INT is activated.
This interrupts the processor. Processor reads
the port during the ISS. Then IBF and INT get
deactivated.
49
Handshake interrupt o/p port
8255
For Port A as handshake interrupt output
port INTA is PC3 ACKA is PC4 OBFA is PC5
ACKB (PC2)
50
Handshake interrupt o/p port
51
Handshake interrupt o/p port
When o/p device wants to receive data it checks
if OBF (output buffer full) signal is 0. If 0,
it receives data on PB7-0 and activates ACK
(Acknowledge) signal. ACK is active low. When
ACK goes high, the data goes out of the port and
OBF is set to 1. If the Port interrupt is
enabled, INT is activated. This interrupts the
processor. Processor sends another byte to the
port during the ISS. Then OBF and INT are reset
to 0.
52
Handshake Status Check I/O
Interrupt is disabled for the port using
PCBSR Even if new data is entered into I/p buffer
by I/O device INT o/p is not going to be
activated for i/p operation How processor knows
that the i/p buffer has new data? Even if I/O
device has emptied the o/p buffer, INT o/p is not
going to be activated for o/p operation How the
processor knows that the o/p buffer is
empty? Processor reads the status of the port
for this purpose
53
Port C as provider of Status
54
Handshake status check i/p port
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