Title: ISP Configuration 1
1ISP Configuration (1)
ISP
Use EIC-100 (with a Computer)
EIC-100 Picture
2Connection Demo
ISP
EIC-100
Connect to USB Port of a PC/NB
ESTD-100 Interface
Target Board
3ESTD-100 Interface
ISP
1. RESET (White)
Target Board
EIC-100
USB PORT
2. VDD (Red)
3. VSS (Black)
4. NC (Orange)
5. NC (Yellow)
6. SCLK (Green)
7. SDATA (Blue)
4ISP Configuration (2)
ISP
Use EIC-101 (with Stand-alone Holtek M1 Writer)
Target Board
ESTD-100 Interface
EIC-101 PCB Cable
5Data EEPROM Accessing
- I/O Flash Type MCU HT48FxxE
- Cost-Effective A/D Flash Type MCU HT46F4xE
- Development Environment
- How to do In System Programming (ISP)
- Data EEPROM Accessing
6Accessing Data EEPROM
Data EEPROM Accessing
HT48FxxE, HT46F4xE Flash MCU
Data EEPROM
Holtek 8-bit MCU Core
EECR
MCU Internal Data Bus
- EECR EEPROM Control Register
- EECR is located at Bank 1 of the RAM Data Memory,
at Address 40H. - Data EEPROM same as HT93LC46 or HT93LC56
7EECR Register
Data EEPROM Accessing
To Access EECR (1) Set BP 1 (Bank Pointer
Register 1) (2) Set MP1 40H (Memory Pointer
MP1 Register 40H)
8Data EEPROM Instruction Set
Data EEPROM Accessing
For Flash MCUs with 128-byte Data
EEPROM HT48F06E, HT48F10E, HT48F30E, HT46F46E,
HT46F47E, HT46F48E
7 Bits in the Address Field
9Data EEPROM Instruction Set
Data EEPROM Accessing
For Flash MCUs with 256-byte Data
EEPROM HT48F50E, HT48F70E, HT46F49E
9 Bits in the Address Field
10READ Timing
Data EEPROM Accessing
Users should generate this timing using EECR
register bits in the program code.
11WRITE Timing
Data EEPROM Accessing
Users should generate this timing using EECR
register bits in the program code.
12EWEN/EWDS Timing
Data EEPROM Accessing
Users should generate this timing using EECR
register bits in the program code.
13ERAL Timing
Data EEPROM Accessing
Users should generate this timing using EECR
register bits in the program code.
14WRAL Timing
Data EEPROM Accessing
Users should generate this timing using EECR
register bits in the program code.
15ERASE Timing
Data EEPROM Accessing
Users should generate this timing using EECR
register bits in the program code.
16END
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