Jacquard:

1
Jacquard Architecture and Application
Performance Overview NERSC Users
Group October 2005
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Outline

• An engineering level overview of the HW and SW
  that make up jacquard.
• CPUs
• Memory
• OS
• Interconnect
• Will use seaborg as a point of reference.

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seaborg.nersc.gov (review?)
16 way SMP NHII Node
Seaborg
380 x
Colony Switch
CSS0
CSS1
crossbar

• 6080 dedicated CPUs, 96 shared login CPUs
• Hierarchy of caching, speeds
• Bottleneck determined by first depleted resource

HPSS
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jacquard.nersc.gov basics
2 way Opteron node
Jacquard
320 x
Infiniband Switch
HT
IB

• 640 dedicated CPUs, 8 shared login CPUs
• Smaller caches, HT, Really Fast
• SMP? NUMA? SUMO.

HPSS
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Opteron Block Diagram Not strictly SMP
SDRAM
SDRAM
Switch, I/O
1 TLB per CPU 1K entries 4K pages ? 4MB coverage
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Hyper Transport Good Stuff
Little conflict between data movement and
computation
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SMP size and memory contention
Why is Jacquard 2 way SMP?
Jacquards numbers 1 task 100 2 tasks 98
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Flops _at_ 2.2 GHz

• Peak Theoretical Flops
• Double (64 bit) floats 1 add 1 mult 2.2
  GFlop/s
• Single (32 bit) floats 2 add 2 mult 4.4
  GFlop/s
• Peak Realized Flops
• Double (64 bit) floats 1.9 GFlop/s
• Single (32 bit) floats 3.4 GFlop/s
• Your Flops?
• Walltime is more important than flops
• For a known algorithm flops are a sanity check

Memory BW 4 GB/sec per CPU
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MPI Bandwidth seaborg
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MPI Bandwidth Jacquard
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Linux for AIX Users

• Linux and AIX are more similar than different
• Linux is not as good as AIX in keeping processes
  scheduled of the same CPU ? processor affinity
  work.
• Linux has easy interfaces to architectural and
  process performance information /proc/cpuinfo,
  /proc/self, etc.
• AIX MPI is in /usr/bin,lib, Linux MPI is in
  modules
• Linux doesnt need bmaxdata !
• Little vs. Big Endian

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Conclusions

• The underlying HW technologies HT, IB, etc. are
  quite promising. Opteron systems are delivering
  great price/performance.
• Still working some SDRAMM, OS, and SW issues.
• Whats useful to you? Let us know.