Programmable pulse sequence generator with multiple output lines

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Programmable pulse sequence generator with
multiple output lines

• Hubert Drabczyk
• Institute of Electronic Systems Warsaw University
  of Technology

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Purpose of the design
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Pulse sequence generator

• Pulse sequence
• different duration of pulses
• different signal for every output
• different voltage levels used
• Application
• device testing
• runtime environment simulation

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Requirements

• multiple output lines
• programmable sequences
• good control of time dependencies between output
  signals
• wide range of output voltage levels
• ability to interact with other parts of the system

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The main idea
PC computer
data link (USB, RS232)
main controller
power supply, local memory buffers, etc.
output controller
output drivers
output lines
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Hardware output control
microcontroller and non-volatile program memory
(e.g. 89S52)
SRAM-based FPGA (e.g. Altera Cyclone)
SRAM buffer (e.g. HM62256)
output drivers (discrete elements)
power supply DACs (e.g. AD5327)
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Software

• PC software GUI, waveform files, data
  preparation and transfer
• uC firmware communication with PC, FPGA device
  programming, power supply control, data buffering
• FPGA configuration data analysis and output
  control in universal code output driving
  in one-task code

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Existing tools adaptation

• Same architecture was used in universal
  programmer
• Flexible output drivers were designed, allowing
  switching between GND/L, H, Vcc1, Vcc2
• Speed was not the essential factor high
  frequency problem

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Output driver
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Conclusion

• Advantages
• multiple lines
• high flexibility
• multipurpose, good base for few-in-one lab
  equipment

• Disadvantages
• slow with universal outputs up to
• 10MHz L-H, 1MHz Vcc1-Vcc2

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Thank you for your attention