ELT 151

1
ELT 151

• PC Hardware Fundamentals
• Lecture 2
• PC Architecture

2
CPU Buses

• Bus a series of connections that carry common
  signals.
• Data Bus bus for passing information (data)
  between the CPU and external memory
• Address Bus bus for the CPU to specify which
  memory cell (address) is to be accessed
• Internal Registers contain information (data) to
  be manipulated by CPU

3
How Microprocessors Work

• How Microprocessors work!
• Intel Microprocessor Quick Reference Guide

4
(No Transcript)
5
Program Execution(Fetch-execute cycle)

• 1. CPU sets address bus to location in memory of
  next instruction.
• 2. Machine language instruction is fetched from
  memory into CPU on data bus.
• 3. If needed, operand (data) is similarly
  fetched from memory, using address bus and data
  bus.
• 4. Instruction is executed, typically doing a
  data register manipulation.
• 5. Depending on the instruction, a data register
  value (result) may be written to memory, using
  address bus and data bus.

6
Abbreviations for numbersused with

• Frequency and time (decimal)
• G Giga 109 Billion
• M Mega 106 Million
• K Kilo 103 Thousand
• m milli 10-3 .001
• u micro 10-6 .000001
• n nano 10-9 .000000001
• Memory and storage capacity (binary)
• K Kilo 210 1,024
• M Mega 220 1,048,576
• G Giga 230 1,073,741,824
• T Tera 240 (13 digit number)

7
Bus and Register Size

• Bus and Register widths are typically (but not
  always) multiples of 8 (e.g. 8, 16, 24, 32, 64)
• An 8 bit data register can contain a value
  ranging from 0 (eight binary zeros) to 255 (eight
  binary ones) for a total of 256 different values.
  28 256
• A 16 bit data register can contain a value
  ranging from 0 (16 binary zeros) to 65,535 (16
  binary ones) for a total of 65,536 different
  values. 216 65,536
• Thus, for n bits,
• the range of possible values is from 0 (all
  zeros) to 2n - 1 (all ones)
• the quantity of different values is 2n

8
Bus and Register Size (continued)

• The width (number of bits) of a CPU
• data register determines the largest value that
  can be manipulated during a single CPU
  instruction
• data bus determines the number of bytes that can
  be transferred during a single CPU memory
  operation - 16 bits wide - 2 bytes
• 32 bits wide - 4 bytes
• 64 bits wide - 8 bytes
• address bus determines the maximum number of
  memory locations that could exist for that CPU -
• 16 bits - 65,536 (64K) max.
• 20 bits - 1,048,576 (1M) max.
• 24 bits - 16M max.
• 32 bits - 4G max.
• 36 bits - 64G max.

9
Frequency and Period

• Any phenomenon that is regularly occurring (such
  as a pendulum swinging) has a frequency and a
  period.
• A digital circuit (computer) clock signal is
  (ideally) a square wave that repeats very
  regularly.
• Frequency is the number of cycles in one second
• It is abbreviated by f
• The unit of measure is Hertz (Hz)
• Period is the time interval for exactly one cycle
• It is abbreviated by T
• The unit of measure (typically) is seconds
• There is a reciprocal relationship between
  Frequency and Period
• f 1/T
• T 1/f
• Example if f 60 Hz, then T 1/60 16.7 m
  Sec.
• Example if f 400 MHz, T 1/400 M 2.5 n Sec.
• Example if T 10 n Sec., f 1/10 n 100 MHz