Digital System Design Gate Level Minimization

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Digital System DesignGate Level Minimization

• Assoc. Prof. Pradondet Nilagupta
• pom_at_ku.ac.th

2
Acknowledgement

• This lecture note is modified from Engin112
  Digital Design by Prof. Maciej Ciesielski, Prof.
  Tilman Wolf, University of Massachusetts Amherst
  and original slide from publisher

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Minimization of Logic Functions

• We have chips with millions of gates
• Why care about minimizing a function?
• What do a few gates matter?
• Basic logic functions replicated thousands of
  times
• Saving one gate for a memory cell pays off
• What is the criterion for minimization
• Should we minimize
• Number of product terms?
• Number of logic operations?
• Number of variables (literals)?
• Number of wires?
• ?
• For implementation minimize number of gates

4
How to Minimize Gate Count?

• Example
• FABCABCABCABC S(2,4,5,6)
• How many gates do we need for implementation?
• If AND gates have 3 inputs and OR gates have 4
  inputs?
• If all gates are binary (2 inputs)?
• Are there any tricks we can use?
• Combine minterms
• ABCABCBC
• ABCABCAB
• F BCAB
• How many gates does F need now?
• Simplest expression
• Minimum number of terms and literals per term
• We need systematic approach to minimize
  expression
• Answer Karnaugh maps (K-maps)

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Karnaugh Maps

• Karnaugh maps (K-maps) are graphical
  representations of boolean functions.
• One map cell corresponds to a row in the truth
  table.
• Also, one map cell corresponds to a minterm or a
  maxterm in the boolean expression
• Multiple-cell areas of the map correspond to
  standard terms.

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Two-Variable Map
x1
1
0
x2
x2
x1
1
0
0
m1
m0
0
1
m2
m0
0
0
2
OR
1
m3
m2
2
3
1
m3
m1
1
3
NOTE ordering of variables is IMPORTANT for
f(x1,x2), x1 is the row, x2 is the column. Cell 0
represents x1x2 Cell 1 represents x1x2 etc.
If a minterm is present in the function, then a 1
is placed in the corresponding cell.
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Boolean Function in Karnaugh Map

• 1s and 0s represent function in Karnaugh map
• 1 represent On-set (F1), 0 represents Off-set
  (F0)
• Similar to truth table
• 0s are typically not shown

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Two-Variable Map

• Any two adjacent cells in the map differ by ONLY
  one variable, which appears complemented in one
  cell and uncomplemented in the other.
• Examplem0 (x1x2) is adjacent to m1 (x1x2)
  and m2 (x1x2) but NOT m3 (x1x2)

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2-Variable Map -- Example

• f(x1,x2) x1x2 x1x2 x1x2 m0
  m1 m2 x1 x2
• 1s placed in K-map for specified minterms m0, m1,
  m2
• Grouping (ORing) of 1s allows simplification
• What (simpler) function is represented by each
  dashed rectangle?
• x1 m0 m1
• x2 m0 m2
• Note m0 covered twice

x2
0
1
2
3
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3-variable Karnaugh Map

• Karnaugh map with 3 variables
• Two variables on one side, one on the other
• Note Gray code sequence (single variable change)
  facilitates grouping of 1-entries into logic
  blocks

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Blocks in Karnaugh Maps

• Identifying blocks in Karnaugh maps
• Neighboring minterms can be combined
• xyz xyz xy(zz) xy
• Resulting expression uses fewer literals (z no
  longer present)

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3-Variable Map
-Note variable ordering is (x,y,z) yz specifies
column, x specifies row. -Each cell is adjacent
to three other cells (left or right or top or
bottom or edge wrap)
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3-Variable Map (cont.)
minterm

• The types of structures that are either minterms
  or are generated by repeated application of the
  minimization theorem on a three variable map are
  shown at right. Groups of 1, 2, 4, 8 are
  possible.

group of 2 terms
group of 4 terms
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Example Blocks in Karnaugh Maps

• Example
• F(x,y,z) S(2,3,4,5) xyzxyzxyzxyz
• Two blocks of size 2
• F xy xy

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Example Blocks in Karnaugh Maps

• What is the Karnaugh map for
• F(x,y,z) S(3,4,6,7) ?
• Block can continue across borders, wrap around
• Left to right
• Top to bottom

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Blocks in Karnaugh Maps

• Can we combine more than two minterms?
• Yes xyzxyzxyzxyz (xx)y(zz)
  y
• Any block that is power of 2 size can be
  reduced
• Needs to be filled entirely with 1s
• Largest possible block yields simplest expression

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Overlapping Blocks

• Example
• F(A,B,C) S(1,2,3,5,7)
• Blocks can overlap
• Still find the largest possible power-2 blocks

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Converting Blocks into Expressions

• How to convert blocks into algebraic expressions?
• Write down the variables that do not change
• Example F(A,B,C) C AB

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Simplification

• Enter minterms of the Boolean function into the
  map, then group terms
• Example f(a,b,c) ac abc bc
• Result f(a,b,c) ac b

bc
a
0 1
0 1
00 01 10 11
00 01 10 11
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More Examples

• f1(x, y, z) ? m(2,3,5,7)
• f1(x, y, z) xy xz
• f2(x, y, z) ? m (0,1,2,3,6)
• f2(x, y, z) xyz

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More Examples
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4-variable Karnaugh Map

• Karnaugh map can be extended to 4 variables
• Top cells are adjacent to bottom cells. Left-edge
  cells are adjacent to right-edge cells.
• Note variable ordering (WXYZ).

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Four-variable Map Simplification

• One square represents a minterm of 4 literals.
• A rectangle of 2 adjacent squares represents a
  product term of 3 literals.
• A rectangle of 4 squares represents a product
  term of 2 literals.
• A rectangle of 8 squares represents a product
  term of 1 literal.
• A rectangle of 16 squares produces a function
  that is equal to logic 1.

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Example

• Simplify the following Boolean function (A,B,C,D)
  ?m(0,1,2,4,5,7,8,9,10,12,13).
• First put the function g( ) into the map, and
  then group as many 1s as possible.

00
01
11
10
g(A,B,C,D) cbdabd
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Example 4-variable Karnaugh Map

• Example F(w,x,y,z) S(0,1,2,4,5,6,8,9,12,13,14)

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Example Simplify Boolean Function

• F(A,B,C,D) ABCBCDABCDABC

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Choice of Blocks

• We can simplify function by using larger blocks
• Do we really need all blocks?
• Can we leave some out to further simplify
  expression?
• Function needs to contain special type of blocks
• They are called Essential Prime Implicants
• Need to define new terms
• Implicant
• Prime implicant
• Essential prime implicant

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Terminology

• Implicant
• Any product term in the SOP form
• A block of 1s in a K-map
• Prime implicant
• Product term that cannot be further reduced
• Block of 1s that cannot be further increased
• Essential prime implicant
• Prime implicant that covers a 1 (minterm) that is
  not covered by any other prime implicant
• Quines Theorem
• Boolean function can be implemented with only
  essential prime implicants (but other solutions
  exist)
• The number of such implicants is minimum

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Example

• F(A,B,C,D) S(0, 2,3,5,7,8,9,10,11,13,15)
• F(A,B,C,D) BDBDCDAD
• BDBDCDAB
• BDBDBCAD
• BDBDBCAB

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Example

• Consider function f(a,b,c,d) whose K-map is shown
  at right.
• ab is not a prime implicant because it is
  contained in b.
• acd is not a prime implicant because it is
  contained in ad.
• b, ad, and acd are prime implicants.

b
ad
cd ab
1
1
1
1
1
1
1
1
ab
1
1
1
acd
acd
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Essential Prime Implicants (EPIs)

• If a minterm of a function F is included in ONLY
  one prime implicant p, then p is an essential
  prime implicant of F.
• An essential prime implicant MUST appear in all
  possible SOP expressions of a function
• To find essential prime implicants
• Generate all prime implicants of a function
• Select those prime implicants that contain at
  least one 1 that is not covered by any other
  prime implicant.
• For the previous example, the PIs are b, ad, and
  acd all of these are essential.

b
ad
1
1
1
1
1
1
1
1
1
1
1
acd
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Another Example

• Consider f2(a,b,c,d), whose K-map is shown
  below.
• The only essential PI is bd.

ab
cd
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Examples to illustrate terms
minimum cover AC BC' A'B'D
minimum cover 4 essential implicants
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Systematic Procedure for Simplifying Boolean
Functions

• Generate all PIs of the function.
• Include all essential PIs.
• For remaining minterms not included in the
  essential PIs, select a set of other PIs to cover
  them, with minimal overlap in the set.
• The resulting simplified function is the logical
  OR of the product terms selected above.

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Example

• f(a,b,c,d) ?m(0,1,2,3,4,5,7,14,15).
• Five grouped terms, not all needed.
• 3 shaded cells covered by only one term
• 3 EPIs, since each shaded cell is covered by a
  different term.
• F(a,b,c,d) ab ac ad abc

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Product of Sums Simplification

• Use sum-of-products simplification on the zeros
  of the function in the K-map to get F.
• Find the complement of F, i.e. (F) F
• Recall that the complement of a boolean function
  can be obtained by (1) taking the dual and (2)
  complementing each literal.
• OR, using DeMorgans Theorem.

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Product of Sums Minimization

• How to generate a product of sums from a Karnaugh
  map?
• Use duality of Boolean algebra (DeMorgan law)
• Look at 0s in map instead of 1s
• Generate blocks around 0s
• Gives inverse of function
• Use duality to generate product of sums
• Example
• F S(0,1,2,5,8,9,10)
• F AB CD BD
• F (AB)(CD)(BD)

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Gate Implementation
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Example POS minimization

• F(a,b,c,d) ab ac abcd

• Find dual of F, dual(F) (ab)(ac)(abcd
  )

• Complement of literals in dual(F) to get FF
  (ab)(ac)(abcd) (verify that this is the
  same as in slide 34)

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5-variable Karnaugh Map
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Relationship Between of adjacent squares and
of literals
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Example 5-variable Karnaugh Map

• Example
• F(A,B,C,D,E) S(0,2,4,6,9,13,21,23,25,29,31)

F ABEBDEACE
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6-variable Karnaugh Map
6- Variable K-Maps
(A,B,C,D,E,F) Sm(2,8,10,18,24, 26,34,37,42,45,5
0, 53,58,61)
D' E F' A D E' F A' C D' F'
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Don't Care Conditions

• There may be a combination of input values which
• will never occur
• if they do occur, the output is of no concern.
• The function value for such combinations is
  called a don't care.
• They are usually denoted with x. Each x may be
  arbitrarily assigned the value 0 or 1 in an
  implementation.
• Dont cares can be used to further simplify a
  function

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Minimization using Dont Cares

• Treat don't cares as if they are 1s to generate
  PIs.
• Delete PI's that cover only don't care minterms.
• Treat the covering of remaining don't care
  minterms as optional in the selection process
  (i.e. they may be, but need not be, covered).

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Minimization example

• F(w,x,y,z) S(1,3,7,11,15) and d(w,x,y,z)
  S(0,2,5)
• What are possible solutions?

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Example
cd
ab
01
11
00
10

• Simplify the function f(a,b,c,d) whose K-map is
  shown at the right.
• f acdabcdabc
• or
• f acdabcdabd
• The middle two terms are EPIs, while the first
  and last terms are selected tocover the minterms
  m1, m4, and m5.
• (Theres a third solution!)

00
01
11
10
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Another Example
cd
ab

• Simplify the function g(a,b,c,d) whose K-map is
  shown at right.
• g ac abor
• g acbd

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NAND and NOR Implementations

• Digital circuit are frequently constructed with
  NAND or NOR gates rather than AND and OR gates.
• NAND and NOR gates are easier to fabricate with
  electronic components and are the basic gates
  used in all IC digital logic families.

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Logic Operation with NAND gate

• NOT, AND, and OR can be implemented with NAND

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Conversion to NAND Implementation

• Minimized expressions are AND-OR combinations
• Two illustrations for NAND gates
• AND-invert
• Invert-OR
• Key observation two bubbles eliminate each
  other
• Two bubbles equal straight wire
• How to generate a sum of minterms using NAND?
• Use AND-invert for minterms
• Use invert-OR for sum

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Conversion to NAND Implementation

• Sum of minterms
• Replace AND with AND-invert and OR with invert-OR
• Still same circuit!
• Replace AND-invert and invert-OR with NAND
• F((AB)(CD)
• ABCD

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NAND Example

• Function F S(1,2,3,4,5,7)
• Minimize and implement with NAND
• Karnaugh map
• Implementation

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Multilevel NAND circuits

• Multilevel circuits conversion rules
• Convert all AND gates to NAND with AND-invert
  symbols
• Convert all OR gates to NAND with invert-OR
  symbols
• Check all bubbles in diagram. For every bubble
  that is not
• compensated by another bubble, insert inverter
• Example

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Example Multilevel NAND Circuits

• F(ABAB)(CD)
• With NAND gates

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Logic Operation with NOR gate

• NOR can also replace NOT, AND, OR
• Two representations of NOR
• OR-invert and invert-AND

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Converting to NOR Implementations

• Same rules as for NAND implementations
• F (ABAB)(CD)
• With NOR
• F(ABAB)(CD)

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Other Two-level Implementation

• Some NAND or NOR gates allow the possibility of a
  wire connection between the outputs of two gates
  provide a specific function. This type of logic
  is called Wire AND Logic.
• The wire AND is not a physical gate, but only a
  symbol to designate the function obtained from
  the indicated wired connection.

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AND-OR-INVERT Implementation

• The two forms NAND-AND and AND-NOR are equivalent
  and can be treated. Both perform the
  AND-OR-Inverter function. The AND-NOR form
  resembles the AND-OR form, but with an inversion
  done by the bubble in the output of NOR gate.
• Example F(ABCDE)
• The circuit of figure (c) is a NAND-AND form and
  was shown in slide 58 to implementation the
  AND-OR-INVERT

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OR-AND-INVERT Implementation

• The OR-NAND and NOR-OR forms perform the
  OR-AND-Invert function. The OR-NAND form
  resembles the OR-AND form, except for the
  inversion done by the bubble in the NAND gate.
• Example F((AB)(CD)E)
• The circuit of figure (c) is a NAND-AND form and
  was shown in slide 58 to implementation the
  OR-AND-INVERT

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Implementation with Other Two-Level forms
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Example

• The complement of the function is simplified into
  sum-of-products form by combining the 0s in the
  map
• F xyxyz
• The normal output for this function can be
  expressed as
• F(xyxyz)

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Example

• The AND-OR-INVERT circuit
• The OR-AND-INVERT circuit