High-Level Test Generation for Gate-level Fault Coverage

1
High-Level Test Generationfor Gate-level Fault
Coverage

• Nitin Yogi and Vishwani D. Agrawal
• Auburn University
• Department of ECE
• Auburn, AL 36849

2
Outline

• Need for High Level Testing
• Problem and Approach
• Spectral analysis and generation of test
  sequences
• RTL testing approach
• Experimental Results
• Conclusion

3
Need for High Level Testing
Seems interesting ! But is it feasible ?

• Motivations for high level testing
• Low testing complexity
• Low testing times and costs
• Early detection of testability issues during
  design phase at high level or RTL
• Difficulty of gate-level test generation for
  black box cores with known functionality

4
Problem and Approach
Thats fine ! But does it work ?

• The problem is
• Develop synthesis-independent ATPG methods using
  RTL circuit description.
• And our approach is
• Implementation-independent characterization
• RTL test generation
• Characterization of RTL vectors for spectral
  components and the noise level for each PI of the
  circuit.
• Test generation for gate-level implementation
• Generation of spectral vectors
• Fault simulation and vector compaction

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RTL Faults
CombinationalLogic
Inputs
Outputs
RTL stuck-at fault sites
FF
FF
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Walsh Functions and Hadamard Spectrum
OKso its just another way of representing
information
w0

• Walsh functions form an orthogonal and complete
  set of basis functions that can represent any
  arbitrary bit-stream.
• Walsh functions are the rows of the Hadamard
  matrix.
• Example of Hadamard matrix of order 8

w1
w2
w3
Walsh functions (order 8)
1 1 1 1 1 1 1 1 1 -1 1 -1 1 -1 1 -1 1
1 -1 -1 1 1 -1 -1 1 -1 -1 1 1 -1 -1 1 1 1
1 1 -1 -1 -1 -1 1 -1 1 -1 -1 1 -1 1 1 1 -1
-1 -1 -1 1 1 1 -1 -1 1 -1 1 1 -1
H8
w4
w5
w6
w7
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Characterizing a Bit-Stream

• A bit-stream is correlated with each row of
  Hadamard matrix.
• Highly correlated basis Walsh functions are
  retained as essential components and others are
  regarded as noise.

Bit stream to analyze
Correlating with Walsh functions by multiplying
with Hadamard matrix.
Bit stream
Spectral coeffs.
Essential component (others noise)
Hadamard Matrix
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Test Vector Generation
OKso you are refining the bit stream

• Spectrum for new bit-streams consists of the
  essential components and added random noise.
• Essential component plus noise spectra are
  converted into bit-streams by multiplying with
  Hadamard matrix.
• Any number of bit-streams can be generated all
  contain the same essential components but differ
  in their noise spectrum.

Perturbation
Spectral components
Generation of test vectors by multiplying with
Hadamard matrix
Essential component retained
New test vector
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RTL Testing Approach (Circuit Characterization)

• RTL test generation
• Test vectors are generated for RTL faults (PIs,
  POs and inputs - outputs of flip-flops.)
• Spectral analysis
• Test sequences for each input are analyzed using
  Hadamard matrix.
• Essential components are currently determined by
  comparing their power Hi2 with the average power
  per component M2.
• Condition to pick-out essential components
  where K is a constant
• The process starts with the highest magnitude
  component and is repeated till the criteria is
  not satisfied.

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Circuit b01 Coefficient Analysis (Vectors for
RTL faults obtained from delay optimized circuit)
Magnitudes of 32 Hadamard Coeffs. for 3 inputs of
b01
Examples of noise components
Examples of essential components
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Selecting Minimal Vector Sequences Using ILP
OKI got that.. What about the RESULTS !!!

• A set of perturbation vector sequences V1, V2,
  .. , VM are generated.
• Vector sequences are fault simulated and faults
  detected by each is obtained.
• Compaction problem Find minimum set of vector
  sequences which cover all the detected faults.
• Minimize CountV1, ,VM to obtain compressed
  seq. V1, ,VC where V1, ,VC V1, ,
  VM CountV1, ,VC CountV1, ,VM Fault
  CoverageV1, ,VC Fault CoverageV1, ,VM
• Compaction problem is formulated as an Integer
  Linear Program (ILP) 1.

1 P. Drineas and Y. Makris, Independent
Test Sequence Compaction through Integer
Programming," Proc. ICCD03, pp. 380-386.
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Experimental Results

• RTL Spectral ATPG technique applied to the
  following benchmarks
• three ITC99 high level RTL circuits
• four ISCAS89 circuits.
• PARWAN processor (Z. Navabi, VHDL Analysis and
  Modeling of Digital Systems, McGraw-Hill, 1993.)
• Characteristics of benchmark circuits
• ATPG for RTL faults and fault simulation
  performed using commercial sequential ATPG tool
  Mentor Graphics FlexTest.
• Results obtained on Sun Ultra 5 machines with
  256MB RAM.

Circuit benchmark PIs POs FFs
b01 ITC99 2 2 5
b09 ITC99 1 1 28
b11 ITC99 7 6 31
b14 ITC99 34 54 239
s1488 ISCAS89 8 19 6
s5378 ISCAS89 36 49 179
s9234 ISCAS89 37 39 211
s35932 ISCAS89 36 320 1728
PARWAN processor 11 23 53
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Results for b11-A
RTL characterization
No. of RTL faults Number of Vectors RTL test cov. () CPU seconds No. of spec. components Gate level test cov. () of RTL vecs.
240 224 76.16 530 256 74.09
RTL-ATPG results
No. of gate-level faults RTL ATPG Spectral Test Sets RTL ATPG Spectral Test Sets RTL ATPG Spectral Test Sets Gate-level ATPG Gate-level ATPG Gate-level ATPG
No. of gate-level faults Gate level cov. () Number of vectors CPU seconds Gate level cov. () Number of vectors CPU seconds
2380 88.84 768 737 84.62 468 1866
Sun Ultra 5, 256MB RAM
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b11-A Circuit
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PARWAN processor
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Results
Circuit name No. of gate-level faults RTL-ATPG spectral tests RTL-ATPG spectral tests RTL-ATPG spectral tests Gate-level ATPG Gate-level ATPG Gate-level ATPG Random inputs Random inputs
Circuit name No. of gate-level faults Cov. () No. of vectors CPU (secs) Cov. () No. of vectors CPU (secs) No. of vectors Cov ()
b01-A 228 99.57 128 19 99.77 75 1 640 97.78
b01-D 290 98.77 128 19 99.77 91 1 640 95.80
b09-A 882 84.68 640 730 84.56 436 384 3840 11.71
b09-D 1048 84.21 768 815 78.82 555 575 7680 6.09
b11-A 2380 88.84 768 737 84.62 468 1866 3840 45.29
b11-D 3070 89.25 1024 987 86.16 365 3076 3840 41.42
b14 25894 85.09 6656 5436 68.78 500 6574 12800 74.61
s1488 4184 95.65 512 103 98.42 470 131 1600 67.47
s5378 15584 76.49 2432 2088 76.79 835 4439 3840 67.10
s5378 15944 73.59 1399 718 73.31 332 22567 2880 62.77
s9234 28976 17.36 64 721 20.14 6967 18241 160 15.44
s9234 29400 49.47 832 2734 48.74 12365 4119 2176 33.06
s35932 103204 95.70 256 1801 95.99 744 3192 320 50.70
PARWAN 5380 89.11 1344 1006 87.11 718 3626 6400 76.63
Reset input added.
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Conclusion

• Spectral RTL ATPG technique applied to three
  ITC99 and four ISCAS89 benchmarks, and a
  processor circuit.
• Results indicate promise in further development
  of the Spectral RTL ATPG technique.
• Test generation using Spectral RTL ATPG brings
  with it all the benefits of high level testing
• Techniques that will enhance Spectral ATPG are
• Efficient RTL ATPG
• Accurate determination and use of noise
  components
• Better compaction algorithms
• Future work Spectral characterization of
  functional vectors.

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• Thank You !
• Questions ?