Logic Synthesis 5

1
Logic Synthesis 5

• Outline
• Multi-Level Logic Optimization
• Recursive Learning - HANNIBAL
• Goal
• Understand recursive learning
• Understand HANNIBAL algorithms
• Optional Reading
• Kunz and Menon, ICCAD94

2
Implications

• Implications
• find all value assignments in circuit necessary
  for the consistency of a given set of value
  assignments
• assignments y 0, f 1 gt d 0, a 0, c 0
• y 0 is justified since a complete set of
  necessary assignments is found
• Direct Implications
• variable assignments that can be made in a
  circuit directly from gate truthtables and
  circuit connectivity
• example above is direct
• y 0, f 1 gt d 0 gt a 0, c 0

a
d
c
y0
f1
3
Indirect Implications

• Indirect Implications
• variable assignments that can only be made
  through the intersection of multiple temporary
  direct implications
• unjustified assignment y 1!
• direct implications blocked since y 1 for d 1
  or e 1
• make both possible assignments at d and e
• make direct implications and look for
  intersection
• location where assignment will be the same in
  either case
• f 1 in either case, so y 1 gt f 1

a1
d1
f1
y1!
f1
c1
e1
4
Recursive Learning

• Apply indirect implications recursively
• to depth limit rmax

r 0 make_all_implications(r, rmax) make all
direct implications set up list Ur of all
unjustified functions if r lt rmax for each
function fi in Ur set up list of justifications
fCr for each justification Ji in fCr make
assignments in Ji make_all_implications(r1,
rmax) if gt1 variable yi in the circuit which
assumes same logic value V for all consistent
justifications Jk in fCr learn yi Vi is
uniquely determined in level r make direct
implications for all yi Vi in level r if all
justifications are inconsistent learn given
situation of value assignments in level r is
inconsistent
5
Logic Optimization

• Indirect implications imply circuit suboptimality
• suggest good factors

a
a
c
y
f
y
f
c
y 1 gt f 1 direct
y 1 gt f 1 indirect blocked at OR gate
y af fc gt (a c)f
a
a
f
c
g
c
g
y
h
y
h
d
d
f
e
f
y 1 gt f 1 direct y g(af fc) h(df
fe) f(g(a c) h(d e))
y 1 gt f 1 indirect blocked at OR gates
e
6
Boolean Division Shannons Expansion

• Expansion of boolean function y w.r.t. variable
  xi
• y(x1...xn) xi y(x1,...xi1,...xn) xi
  y(x1,...xi0,...xn)
• Generalization to function variables
• y(x) f(x) y(x)f(x)1 f(x) y(x)f(x)0
• y(x)f(x)V y(x) if f(x)V, X (dont care)
  otherwise
• f(x) xi is a special case
• Example
• y (a f)(f c)
• y f(a 1)(1 c) f(a 0)(0 c) f fac
  f ac

7
Optimization by Expansion

• Expansion is a form of boolean division
• generates many internal dont cares
• exploit dont cares to optimize circuit
• use y as cover for y(x)f(x)1 and y(x)f(x)0
• y f y f y
• do not substitute constants into y
• even more redundancy in circuit
• example (a f)(f c) for 1, (a f)(f c)
  for ac
• Optimization approach
• find divisor f
• transformation y f y f y
• reduction remove redundancy
• repeat until cost is stable

8
Finding Divisors Indirect Implications

• Permissible function
• can replace y with y and not change circuit
  function
• exploit dont cares
• example y ab, b is dont care, then y a
• Transformations
• both stuck-at faults at y are testable
• some circuit input values will force y to both 0
  and 1 and some output value will depend on this
• f not in transitive fanout of y - no loops
• y yf1 f y f for implication y0 gt
  f1
• y f yf0 f y for implication y0 gt f0
• y f yf1 f y for implication y1 gt f1
• y f y f y, f y 0, so y f y
• y f yf0 f y for implication y1 gt
  f0
• complete set - can compose to get any
  transformation

9
Making Implications

• Use D-calculus to make implications
• V 0, 1, D, D, X
• D - node stuck-at-1
• D - node stuck-at-0
• X - unknown
• 5-valued truthtables, 1 and D D, 0 or D D,
  invert(D) D
• D and D act as dont cares
• other nodes could be 0 or 1
• implication is true regardless of other node
  values
• e.g. y 0 gt f 1 for all other node values
• Circuit transformations must work for all circuit
  inputs

10
Divisor Selection

• Make implications at all nodes
• results in many implications
• many circuit transformations are possible
• Choose most indirect implication
• most likely to reduce circuit a lot
• Limit recursion depth
• execution time goes up exponentially with rmax
• use recursion depth 2
• all optimizations found with higher recursion
  depth can be found with sequence of optimizations
  at smaller depth

11
Division and Redundancy Removal

• Modify circuit according to transformation
• y f y for implication y1 gt f1
• insert AND gate
• similar for other three transformations
• Remove redundancy using redundant faults
• identify all redundant faults in transformed
  circuit
• use ATPG techniques
• consider stuck-at-0/1 faults in nodes touched by
  recursive learning to find current transformation
• fault is redundant if no test can be found for it
• it does not change circuit function
• replace fault with constant (e.g. 0 for
  stuck-at-0)
• perform constant propagation - AND(1, A) A

f
y
y
12
Example
Determine divisor
f1
a
f
u
b
y1
Remove redundancy
c
y
v
a
u
w
b
d
y
c
v
w
Transform circuit
d
a
u
Save one AND gate
b
f
y
SA1
c
v
y
w
SA1
d
13
Conclusions

• Among best optimization results to date
• up to 30 better than factorization by kernels
• redundancy addition/removal uses related approach
• Reasonable execution time
• 2 minutes to 7 hours on SPARC 10 for ISCAS85
  circuits
• up to 60 reduction in circuit size from original
• Conclusions
• structural techniques work better than
  equation-based techniques
• ATPG-based factorization works better than
  kernel-based techniques
• LOT adds transforms to improve testability and
  optimization
• Minpower adds transforms to minimize power
  consumption