Asynchronous Circuits Design

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Asynchronous Circuits Design
First Presentation
Title Asynchronous Thumb Architecture
Reporter GI2 . 33 ???
Date 1998/12/10
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Outline
Introduce ARM Architecture Thumb
Concept Implementation Thumb Advantage Conclusi
on
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Introduce ARM Architecture
ARM (Advanced RISC Machine) Acorn
Computers Limited from Cambridge ARM designs and
licenses high performance, low cost, power
efficient RISC microprocessors, related
technology and software in order to enhance
performance, cost-effectiveness
and power-efficiency in an extensive range of
applications.
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Introduce ARM Architecture (cont.)
Best MIPS per watt
( Note For 3V devices.)
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Introduce ARM Architecture (cont.)
Smallest CPU die size
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Introduce ARM Architecture (cont.)
Best MIPS per At a cost of less than 0.5 per
MIP of processing power, ARM has the most
competitively priced products in their class,
enabling the emergence of new exciting consumer
products.
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Introduce ARM Architecture (cont.)
Best code density, with Thumb extension
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Introduce ARM Architecture (cont.)
Why Thumb ? ARM processors code density is not
as good as some CISC processors . Where code
density is of prime importance , ARM Limited has
incorporated a novel mechanism , called the Thumb
architecture , into some version of the ARM
processor . The Thumb instruction set is a
16-bit compressed form of original 32-bit ARM
instruction set , and employs dynamic
decompression hardware in the instruction
pipeline . Thumb code density is better than that
achieved by most CISC processors .
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Thumb Concept
Thumb is an extension to the ARM architecture. It
contains 36 instruction formats drawn from the
standard 32-bit ARM instruction set that have
been re-coded into 16-bit wide opcodes. Figure
1
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Figure 1 instructions as a recoded subset of the
ARM instruction set
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Thumb Concept (cont.)
Thumb properties The Thumb code
requires 70 of the space of the ARM code. The
Thumb code uses 40 more instructions than the
ARM code. With 16-bit memory , the Thumb
code is 45 faster than the ARM code . Thumb
code use 30 less external memory power than ARM
code .
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Implementation
Hardware aspects The major new addition to the
ARM architecture to support the Thumb instruction
set is the Thumb decompressor. ARM7TDMI is the
first ARM core to implement this. Figure 2
(ARM7TDMI) Figure 3, 4
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Figure 2 ARM7TDMI core showing the Thumb
instruction decompressor
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Implementation (cont.)
Figure 3 Pipeline fetch, decode and execution
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Figure 4 Thumb decoding and decompression
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Implementation (cont.)
Thumb to ARM instruction mapping
Figure 5
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Figure 5 Translation of Thumb ADD to ARM ADD
instruction
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Thumb Advantage
Advantage Excellent code density
The Thumb instruction set gives excellent
code density compared to both 32-bit
cores and the 8 and 16-bit processors
commonly used in embedded
applications. Memory size and system
costs are thereby reduced.
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Thumb Advantage (cont.)
16-bit instructions Thumb instructions are only
16-bits long, meaning that the system data bus
need only be 16-bits wide. This reduces both
power consumption and PCB area, leading to
lowercost, lowerpower systems.
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Thumb Advantage (cont.)
Smallest core die size Thumb-aware cores have
amongst the smallest core die sizes in the
industry (ARM7TDMI is less than 5 mm2 on 0.6µ)
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Thumb Advantage (cont.)
Full 32-bit architecture Thumb instructions
execute on ARM's full 32-bit RISC architecture.
The designer is therefore able to exploit fast
32-bit maths and a simple unsegmented memory map
that has a 4 GByte address space room for the
most complex of embedded control applications.
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Thumb Advantage (cont.)
Code size and performance Thumb-aware cores such
as the ARM7TDMI execute both 32-bit ARM and the
new 16-bit Thumb instructions. Designers can mix
routines of Thumb and ARM code in the same
address space. This allows the programmer to
trade-off code size and performance, routine by
routine, as required by the application.
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Conclusion
Introduce to Thumb Use the way like TITAC , the
data dependency graph , and implementation with
Q element .