JaegerBlalock

1
Chapter 5Bipolar Junction Transistors

• Microelectronic Circuit Design
• Richard C. Jaeger
• Travis N. Blalock

Chap 5 - 1
2
Chapter Goals

• Explore physical structure of bipolar transistor
• Understand bipolar transistor action and
  importance of carrier transport across base
  region
• Study terminal characteristics of BJT.
• Explore differences between npn and pnp
  transistors.
• Develop Transport and Ebers-Moll models for
  bipolar device.
• Define four operation regions of BJT.
• Explore model simplifications for each operation
  region.
• Understand origin and modeling of Early effect.
• Present SPICE model for bipolar
  transistor.Provide examples of worst-case and
  Monte Carlo analysis of bias circuits.
• Discuss bipolar current sources and current
  mirror.

Chap 5 - 2
3
Physical Structure

• Consists of 3 alternating layers of n- and p-type
  semiconductor called emitter (E), base (B) and
  collector (C).
• Majority of current enters collector, crosses
  base region and exits through emitter. A small
  current also enters base terminal, crosses
  base-emitter junction and exits through emitter.
• Carrier transport in the active base region
  directly beneath the heavily doped (n) emitter
  dominates i-v characteristics of BJT.

Chap 5 - 3
4
Transport Model for npn Transistor

• Base-emitter voltage vBE and base-collector
  voltage vBC determine currents in transistor and
  are said to be positive when they forward-bias
  their respective pn junctions.
• The terminal currents are collector current(iC ),
  base current (iB) and emitter current (iE).
• Primary difference between BJT and FET is that iB
  is significant while iG 0.

• Narrow width of the base region causes coupling
  between the two back to back pn junctions.
• Emitter injects electrons into base region,
  almost all of them travel across narrow base and
  are removed by collector

Chap 5 - 4
5
npn Transistor Forward Characteristics
Base current is given by
is forward common-emitter current gain
Emitter current is given by
Forward transport current is IS is saturation
current
is forward common- base current gain
In this forward active operation region,
VT kT/q 0.025 V at room temperature
Chap 5 - 5
6
npn Transistor Reverse Characteristics
is reverse common-emitter current gain
Base currents in forward and reverse modes are
different due to asymmetric doping levels in
emitter and collector regions.
Emitter current is given by
Reverse transport current is
is reverse common-base current gain
Base current is given by
Chap 5 - 6
7
npn Transistor Complete Transport Model
Equations for Any Bias
First term in both emitter and collector current
expressions give current transported completely
across base region. Symmetry exists between
base-emitter and base-collector voltages in
establishing dominant current in bipolar
transistor.
Chap 5 - 7
8
Transport Model Calculations Example
Evaluating the expressions for terminal currents,

• Problem Find terminal voltages and currents.
• Given data VBB 0.75 V, VCC 5.0 V, IS 10-16
  A, bF 50, bR 1
• Assumptions Room temperature operation, VT 25.0
  mV.
• Analysis VBE 0.75 V,
• VBC VBB- VCC 0.75 V-5.00V-4.25 V

Chap 5 - 8
9
pnp Transistor Structure

• Voltages vEB and vCB are positive when they
  forward bias their respective pn junctions.
• Collector current and base current exit
  transistor terminals and emitter current enters
  the device.

Chap 5 - 9
10
pnp Transistor Forward Characteristics
Base current is given by
Emitter current is given by
Forward transport current is
Chap 5 - 10
11
pnp Transistor Reverse Characteristics
Base current is given by
Emitter current is given by
Reverse transport current is
Chap 5 - 11
12
pnp Transistor Complete Transport Model
Equations for Any Bias
Chap 5 - 12
13
Operation Regions of Bipolar Transistor
Base-emitter junction
Base-collector junction
Chap 5 - 13
14
i-v Characteristics of Bipolar Transistor
Common-Emitter Output Characteristics
For iB0, transistor is cutoff. If iB gt0, iC also
increases. For vCE gt vBE, npn transistor is in
forward active region, iC bF iB is independent
of and vCE. For vCElt vBE, transistor is in
saturation. For vCElt 0, roles of collector and
emitter reverse.
Chap 5 - 14
15
i-v Characteristics of Bipolar Transistor
Common-Base Output Characteristics
For vCB gt 0, npn transistor is in forward active
region, iC iE is independent of and vCE. For
vCBlt 0, base-collector diode becomes
forward-biased and iC grows exponentially (in
negative direction) as base-collector diode
begins to conduct.
Chap 5 - 15
16
i-v Characteristics of Bipolar Transistor
Common-Emitter Transfer Characteristic
Defines relation between collector current and
base-emitter voltage of transistor. Almost
identical to transfer characteristic of pn
junction diode Setting vBC 0 in the
collector-current expression,
Chap 5 - 16
17
Junction Breakdown Voltages

• If reverse voltage across either of the two pn
  junctions in the transistor is too large,
  corresponding diode will break down.
• Emitter is most heavily doped region and
  collector is most lightly doped region.
• Due to doping differences, base-emitter diode has
  relatively low breakdown voltage (3 to 10 V).
  Collector-base diode can be designed to break
  down at much larger voltages.
• Transistors must be selected in accordance with
  possible reverse voltages in circuit.

Chap 5 - 17
18
Early Effect and Early Voltage

• As reverse-bias across collector-base junction
  increases, width of collector-base depletion
  layer increases and width of base decreases
  (base-width modulation).
• In practical BJT, output characteristics have a
  positive slope in forward-active region,
  collector current in not independent of vCE.
• Early effect When output characteristics are
  extrapolated back to point of zero iC, curves
  intersect at common point vCE -VA (Early
  voltage) which lies between 15 V and 150 V.
• Simplified equations (including Early effect)

Chap 5 - 18
19
High Performane BJTs

• Modern BJTs use combination of shallow and deep
  trench isolation processes to reduce device
  capacitances and transit times.
• Have polysilicon emitters, narrow bases or SiGe
  base regions.
• SiGe transistors exhibit cutoff frequencies gt 100
  GHz.

Chap 5 - 19
20
Biasing for BJT

• Goal of biasing is to establish known Q-point
  which in turn establishes initial operating
  region of transistor.
• In BJT, Q-point is represented by (IC, VCE) for
  npn transistor or (IC, VEC) for pnp transistor.
• Q-point controls values of diffusion
  capacitance, transconductance, input and output
  resistances.
• In general, during circuit analysis, we use
  simplified mathematical relationships derived for
  specified operation region and Early voltage is
  assumed to be infinite.
• The practical biasing circuits used for BJT are
• Four-Resistor Bias network
• Two-Resistor Bias network

Chap 5 - 20
21
Four-resistor biasing
22
Four-Resistor Bias Network for BJT
Q-point is (250 mA, 4.17 V)
Chap 5 - 22
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Four-Resistor Bias Network for BJT (contd.)

• All calculated currents gt 0, VBC VBE - VCE
  0.7 - 4.32 - 3.62 V
• Hence, base-collector junction is reverse-biased,
  assumption of forward-active region operation is
  correct.
• Load-line for the circuit is

The two points needed to plot the load line are
(0, 12 V) and (314 mA, 0).Resulting load line is
plotted on common-emitter output
characteristics. IB 2.7 mA, intersection of
corresponding characteristic with load line gives
Q-point.
Chap 5 - 23
24
Four-Resistor Bias Network for BJT Design
Objectives

• We know that
• This implies that IB ltlt I2. So that I1 I2. So
  base current doesnt disturb voltage divider
  action. Thus, Q-point is independent of base
  current as well as current gain.
• Also, VEQ is designed to be large enough that
  small variations in VBE assumed value of wont
  affect IE.
• Current in base voltage divider network is
  limited by choosing
• This ensures that power dissipation in bias
  resistors is lt 17 of total quiescent power
  consumed by circuit and I2 gtgt IB for bgt50.

for
Chap 5 - 24
25
Four-Resistor Bias Network for BJT Design
Guidelines

• Choose Thevenin equivalent base voltage
• Select R1 to set I1 9IB.
• Select R2 to set I2 10IB.
• RE is determined by VEQ and desired IC.
• RC is determined by desired VCE.

Chap 5 - 25
26
Four-Resistor Bias Network for BJT Example

• Problem Design 4-resistor bias circuit with
  given parameters.
• Given data IC 750 mA, bF 100, VCC 15 V,
  VCE 5 V
• Assumptions Forward-active operation region,
  VBE 0.7 V
• Analysis Divide (VCC - VCE) equally between
  RE and RC.Thus, VE 5 V
• and VC 10 V

Chap 5 - 26
27
Two-Resistor Bias Network for BJT Example

• Problem Find Q-point for pnp transistor in
  2-resistor bias circuit with
• given parameters.
• Given data bF 50, VCC 9 V
• Assumptions Forward-active operation region,
  VEB 0.7 V
• Analysis

Q-point is (6.01 mA, 2.88 V)
Chap 5 - 27
28
BJT Current Mirror

• Collector terminal of a BJT in forward-active
  region mimics behavior of a current source.
• Output current is independent of VCC as long as
  VCC gt 0. Thus, BJT is in forward-active region,
  since VBC - VCC.
• Q1 and Q2 are assumed to be matched (with
  identical IS, bF, bR, VA,)

Chap 5 - 28
29
BJT Current Mirror (contd.)

• With infinite bFO and VA, mirror ratio is
  unity. Finite current gain and Early voltage
  introduce mismatch in output and reference
  current of mirror

Chap 5 - 29
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BJT Current Mirror Example

• Problem Find output current for given current
  mirror
• Given data bFO 75, VA 50 V
• Assumptions Forward-active operation region, VBE
  0.7 V
• Analysis

Chap 5 - 30
31
BJT Current Mirror Altering Mirror Ratio

• Mirror ratio of BJT current mirror can be
  changed by changing relative sizes of emitters in
  the transistors. For ideal case, mirror ratio is
  determined only by ratio of the two emitter areas.

where ISO is saturation current of BJT with one
unit of emitter area AE 1(A). Actual dimensions
of A are technology-dependent.
Chap 5 - 31
32
BJT Current Mirror Output Resistance

• Current source using BJT doesnt have an output
  current that is completely independent of
  terminal voltage across it, due to finite early
  voltage. Current source seems to have resistive
  component with it.
• Ro is the small signal output resistance of the
  current mirror.

Chap 5 - 32
33
Tolerances-Worst-Case Analysis Example

• Problem Find worst-case values of IC and VCE.
• Given data bFO 75 with 50 tolerance, VA 50
  V, 5 tolerance on VCC, 10 tolerance for each
  resistor.
• Analysis

To maximize IC , VEQ should be maximized, RE
should be minimized and opposite for minimizing
IC. Extremes of RE are 14.4 kW and 17.6 kW.
To maximize VEQ, VCC and R1 should be maximized,
R2 should be minimized and opposite for
minimizing VEQ.
Chap 5 - 33