Title: Advanced Digital Circuits ECET 146 Week 3
1Advanced Digital CircuitsECET 146Week 3
- Professor Iskandar Hack
- ET 221G, 481-5733
- hack_at_ipfw.edu
2This Weeks Goals
- Designing a Combinational Circuit from Truth
Table - Introduction to the Programming Hardware
- Verifying a design in Hardware
3Designing from a Truth Table
- Write a Sum of Product Equation straight from the
truth table - Draw the schematic from the Equation
- No Need to minimize equation (the software will
find the minimum solution for the Altera
architecture)
4Writing the Equation
- Look at the Truth Table and everywhere the output
is a one then you will generate a term in the Sum
of Products - The term generated will depend on the values of
ABCD in the table for that term. - If the value for an input is a zero then the term
would contain an T-not - If the value for an input is an one then the term
would contain T
5Table Equivalent Terms
- The Term for each of the entries is shown here
6Example 1
- Write the Equation for the following table
7Comments regarding Example 1
- There were 8 ones in the table, thus there
would be 8 terms in the equation - Each one will create exactly one term, that can
be easily written by looking at the table and
writing the term by looking at the values - Example if you look at the third line of the
table A 0, B0, C1, and D0 and the output is
1. That would generate the term
8Solution to Example 1
9Drawing Schematic
- Open Altera Quartus II Software
- File-gtNew-gtSchematic File
- Insert Inputs and inverters to create inputs for
AND gates - Draw AND gates, selecting appropriate inputs for
each - OR the output of the eight AND gates
- Insert Output
10Insert Inputs and Inverters
Draw the following circuit using INPUT and
Inverters and draw the wires out of each inverter
as shown
11Name Pins and Nets
- As in previous labs name the pins A-D
- Click on each wire from the inputs and name them
A-D - Click on each wire from the inputs and name them
Anot-Dnot
12Add AND4 Gates
- Insert 8 AND4 gates (remember one AND gate per
term)
13Connect Inputs to AND Gates
- Connect the four inputs to the AND gates
according to the equation. - This is done by drawing a small wire from each
input and naming it as before. - Name them according to the equations from the
previous slide
14The AND gates Connected
15Add OR8 and connect the Product Terms
16Insert Output (and name it)
17Completed Schematic
18Save File
Click this to Create project
19Creating the Project -1
First two screens take default and hit next
20Device Number
Part Number
21Creating the Project II (Select Device)
MAX7000S Family
Need a specific device
EPM7128SLC84-7 is the chip on the board
Hit Finish when done
22Compiling the Project
- Hit the hot key on the top of the screen to start
compiling your project.
23The Compiler
- If you did everything right thus far you should
see something like this
24Compiler Reports
- The compiler creates a number of reports, which
at this point would mean nothing to you, but you
may want to explore them.
Boolean EQ
I/O pin info
25Comments regarding errors
- It is very possible that youll get errors on
this drawing. If so look for two connections on a
wire to one of the AND gate inputs. This is the
most common error. This often happens on the last
AND gate if the wires brought down end at the
same point you draw the wire across. Just delete
the wire and redraw it.
26Assigning Pins - I
27Assigning Pins II
- Look at the board and decide where you would want
the Inputs and Output to be. - The available pins are on the strips next to the
Max Part. - Note Pin 2 is reserved for the clock and Pin 1 is
reserved for the reset button
28Assigning Pins III
Use for inputs
Outputs
29Assigning Pins IV
- Drag the pins from the top (unassigned pins) to
the desired pin location
B being dragged
A already assigned To Pin 15
30Pin assignments completed
31Assigning Pins III
- Type in the Name of the I/O pin and either Input
or Output should show up (if you type it
correctly)
Pin Name
Notice Input Shows up
32Recompile after Assigning Pins
33Check New Pin Assignments
- Open the resource files to look at the pin
assignment after recompiling.
Output pins
Click to look at input pins
Input pin assignments
34NOTE
- The following slides were copied from Lecture two
and the waveforms DO NOT match this example. They
are included for instructional purposes only.
35Drawing Waveforms for Simulation
- We now need to create a new file to hold our
simulation input waveforms. This done by hitting
new and selecting Other and vector waveform file
(vwf) -
36Entering Nodes
- You will need to double click in the node area of
the display this will bring up the following
dialog box
Select Node Finder
37Entering Nodes II
(1) Start by selecting Pins all
(2) Then hit List
(3) Move all pins to the right by hitting gtgt
(4) Hit OK
38Check if all nodes are selected
- Verify in the waveform editor that all nodes are
shown
Inputs
Output
39Change Grid and End Time
- Select Edit, Grid time, and change it to 50 nS
- Select Edit, End time and change it to 1.6 uS
40Grouping Inputs
- Select all the inputs, right click, hit Group
and use inputs3..0 for the name of the inputs,
Hex as radix, and uncheck grey count
41Display after Grouping
will expand group to show the individual
pins - will hide individual pins
42Using Count Function
- Select the Group, and then hit the count button
on the left side of the screen. Take the defaults
(start at 0, incr by 1, End value F)
43Display after Count
- You should see the following after hitting OK
44Save Simulation File
- Up to now you should have seen that the output is
neither high or low. That is because it has not
been simulated yet. - In order to simulate you must first save the file
as example1.vwf
Leave checked
45Simulate
- This is the easy part Hit the simulate button
on the top of the screen.
Simulate
46Verify Simulation
- You should have a value for the output for each
input condition. - Manually determine (using techniques from ECET
111) what the output should be for each condition
and verify that the output matches that.
47Simulation Display
48Connect the Altera Board to the PC
- Check out an Altera Board from the Lab Tech
office - DO NOT connect any parts to the board before
programming!!!! - The board has the design from the last time it
was used and its possible that some inputs now
are now outputs and that you can destroy the
part.
49Connect Board to PC I
- When checking out board also check out DC wall
pack. Ensure that the wall pack is of the correct
polarity ( is the center, - is the outside) and
is between 9 and 12 volts. - Also get a Male -gt Female DB25 cable to connect
between the computer and the PC
50Connect to PC II
- Notice the location of the connectors used, the
other DB25 connector is used for experiments.
DC Power connector
DB25 Cable to PC
51Open the Programming Module
- Select the Programmer Hot Button
52Select Programming Hardware
- Once the programmer is opened hit hardware
setup - Then select Add Hardware
- Selected Byteblaster on LPT1
53Select Programming Options
- Select Program/Configure and Verify
54Program the Part
- Hit the start button
- You should see the progress bar move and the red
LED come on (on the board) during programming
55Wire up Board
- Connect VCC and Ground to the proto board by
using the 5 volts and Ground on the top of the
board. - DO NOT use the unregulated DC!!! This could be as
high as 12 volts and will destroy the part. - Place wires from the Input's to Ground on the
proto board (this is input A0, B0, C0, D0)
56Wire Up Board II
- For this Lab well use positive logic (the Altera
part supplies the 5 volts for the LED), so
connect the LED as shown.
57Wired Board
- Your board after wiring should resemble the
following
Output X
Inputs
58Verify the Design
- Move the input wires thru the 16 possible
combinations (0000 to 1111) to verify that the
design matches the truth table
59Summary
- This week we covered how to go from any truth
table to a schematic very quickly in the Altera
software - We also went thru the procedure to specify a
device, lock our input/output pins to particular
pins and program the device - We also we over how to verify a combinational
logic design using the Altera hardware
60Lab Two
- Design a circuit and verify it using the
techniques covered in this weeks lecture that
will have the following truth table. - Turn in your printouts from the schematic editor
and simulator. - Have myself or the TA initial the schematic to
verify that your circuit worked