The Potential of TraceLevel Parallelism in Java Programs

1
The Potential of Trace-Level Parallelism in Java
Programs

• Borys J. Bradel
• Tarek S. Abdelrahman
• University of Toronto
• Principles and Practices of Programming in Java
• September 7th 2007

2
Motivation

• Gap exists between hardware and software
• Hardware
• Majority of computer chips contain multiple cores
• Athlon X2, Core 2 Duo, Power5, Cell, Niagara
• Software
• Writing parallel software is difficult
• Bridging the gap may lead to better utilization
  of hardware and therefore improved performance

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Automatic Parallelization

• Traditional compile time
• Perform analysis at compile time
• Divide program based on analysis
• Limited success
• Runtime
• New approach to automatic parallelization is
  needed
• Combine analysis with runtime information
• What information to use?
• Trace-Based
• Our solution is to use traces

3
4
How successful can using traces be?

• We answer this question by simulating trace
  execution
• monitor a programs execution
• simulate the execution of traces in parallel
• Measure a practical upper-bound on parallelism
• not an accurate measurement of performance

5
Outline

• Traces
• Execution Model
• Simulation Platform
• Experimental Evaluation
• Conclusion

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Trace Definition

• A trace is a frequently executed sequence of
  unique basic blocks or instructions
• Identified by a trace collection system at runtime

public static int foo() int a0 for (int
i0iltni) ai return a
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Benefits

• Source code is not required
• Granularity of parallelism can vary
• Traces simplify control flow and analysis
• Traces are simple to identify

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Execution Model
parallel
sequential
CFG
Method
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Dependence Communication
Method
Dependences limit parallelism

ai
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Dependence Communication
Different types of communication
Instruction-Instruction
Trace-Trace
i4
i4
ai
Communication Delay
Trace-Instruction
ai
i4
ai
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Requirements

• Java Virtual Machine
• Execute bytecode
• Interpreted or compiled
• Trace Collection System
• monitor control flow
• create traces

JVM
Code Execution
control flow
TCS
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Parallel Identification Engine

• Records memory information
• Keeps track of dependences
• Ignore instructions that read and write to the
  same variablee.g. dependence between i and
  itself is ignored
• Schedules instructions
• Instruction Window
• Communication
• Processor Count

JVM
Code Execution
control flow
instruction info
traces
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Scheduling
Record trace information when traces execute
sequentially Schedule when instruction window
is full
Schedule
Schedule
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Schedule around Dependences
4 processors 12 traces per window

• Dependent traces are scheduled far enough apart
  to have correct execution

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Speedup

• Ratio
• Cycles aggregated all scheduled traces on
  parallel system
• Cycles over all scheduled traces on one processor
  system
• Each trace executes sequentially on one processor
• A cycle represents the write of one memory
  location

ai i
B1
2 cycles
if (iltn) goto B1
B2
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Experimental Evaluation

• Jupiter Patrick Doyle
• RedSpot Borys Bradel
• Modified Critical-Path Min-You Wu scheduler
• Benchmarks
• Java Grande Section 3
• SPECjvm98

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Effect of Window Size
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Effect of Communication Cost
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Effect of Communication Type
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Effect of Processor Count
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Conclusion

• How successful can using traces be?
• Built simulator to measure parallel execution of
  traces
• Traces have the potential to be used to
  parallelize programs
• Some benchmarks do not scale well
• Some benchmarks scale very well
• Most benchmarks have at least 2x speedup on four
  processors
• Future work create a system that performs
  trace-based parallelization

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Jupiter and RedSpot
Interpreter emulate a0 emulate i0 emulate goto
B2 call RedSpot emulate if (iltn)
goto B1 call RedSpot emulate ai emulate
i emulate if (iltn) goto B1 call RedSpot
Trace 1
emulate ai emulate i emulate if (iltn) goto B1
call RedSpot
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Parallel Identification Engine
Interpreter emulate if (iltn) goto B1 call
RedSpot call PIE emulate ai
call PIE emulate
i
call PIE emulate if (iltn) goto B1 call
RedSpot call PIE emulate ai
call PIE emulate
i
call PIE emulate if (iltn) goto B1 call
RedSpot call PIE
call call PIE for each instruction and each
memory access
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Processor Count
Maximum number of processors limits performance
2 processors
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Scheduling Window
Can only schedule a limited number of tracesat a
time
4 traces per window