USB 2'0 Electrical Overview

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USB 2.0 Electrical Overview

• Jon LuekerIntel Corporation

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Highlights of the USB 2.0 Electrical Specification

• High-speed signaling mode 480 Mb/s
• Existing cables and connectors
• Seamless forward/backward compatibility
• High-speed functionality smoothly layeredover
  existing USB 1.1
• Specifications for each element testable through
  the use of required test modes

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USB 2.0 - An Extensionof USB 1.1

• All the functionality of USB 1.1
• High-speed signaling mode
• Protocol for detecting high-speed capability
• Protocols for entering/exiting high-speed
• Mechanism for disconnect detection
• Low-/full-speed specifications tightened, but
  only for high-speed capable ports
• Section 7.2 (Power Distribution)specifications
  unchanged

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USB 2.0 is Interoperable with USB 1.1

• All compliant USB 1.1 devices, hubs, and cables
  will work with new 2.0 host controllers
• USB 2.0 devices and hubs will work with 1.1 host
  controllers (but not at 480 Mb/s!)
• High-speed signaling is supported over compliant
  USB 1.1 cables and connectors

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Legacy USB Devices(Other than Hubs)

• Compliant USB 1.1 devices will generally beUSB
  2.0 compliant
• Exception Low-speed devices with unshielded,
  captive cables
• USB 2.0 requires foil and drain wire in low-speed
  captive cables

This Is a Compliance Issue It Doesnt Affect
1.1/2.0 Interoperability!
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USB 2.0 High-speed Capable Devices

• Required to support full-speed signaling
• Required to at least enumerate in full-speed
• Required to meet tightened full-speedelectrical
  specifications
• Must not support low-speed mode

Its Likely That Vendors of High-Speed Capable
Devices Will Support Full-Speed Operating Modes (
250 Million Existing USB 1.1 Ports! )
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USB 2.0 Hubs andHost Controllers

• Required to support low, full, and high-speed
  modes on downstream facing ports
• Required to support full-/high-speed on upstream
  facing ports
• Required to support tightened low-/full-speed
  electrical specifications

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USB 1.1/2.0Interoperability Matrix
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High-Speed Electrical Layer

• New signaling
• New transceiver elements
• New bus states
• New low-level protocols
• New test modes

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Differential Current Drive
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Source/Load Terminations

• Use of terminations at source and load enable
  high signal integrity
• Reflection coefficient (RT - Z0) / (RT Z0)

Example For Z0 52 Ohms and RT 40 Ohms,
reflection coefficient is -13 In the case of a
source terminated link, there is a 13
additive/subtractive inter-symbol
interference With source and load terminations of
40 Ohms, the effect is reduced to (13)2, or
1.7 Double terminations have a similar benefit
in reducing the effects of connector and board
related discontinuities
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USB 2.0 Dual Terminations
Single Termination
Dual Termination

• Simulation assumes ideal transceivers and
  terminations
• Typical imperfections are modeled for cable,
  connectors, bond wires, etc.
• 2.7X increase in eye opening, 2.7X decrease in
  jitter

Dual Termination Makes USB 2.0 Speeds Possibleon
USB 1.X Cable Assemblies
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Full-Speed DriversProvide Terminations

• Full-speed drivers asserting SE0 look like
  resistance to ground
• ZDRV RS 45 Ohms, /- 10
• RS may be integrated on-die or placed off-chip

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Existing Cablesand Connectors

• No changes to connector specifications
• Cable specs added to USB 1.1 guarantee
  performance, but pre-ECN cables will support
  high-speed

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DC Coupled

• Low-/full-speed modes require DC coupling
• DC coupling for high-speed simplifies board
  design and minimizes cost
• Worst case skin-effect losses still
  leavereliable eye opening
• Use of individual ferrite beads on D and D-
  lines no longer possible, but shielded low-speed
  cable requirement helps a lot

No New Magnetics Required for USB 2.0
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High-Speed Signaling Is Only Sensed Differentially
Differential Common Mode Total Signal
High-Speed Driver Generates Differential and
Common Mode Components, but Receiver Only Senses
Differential Portion
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High-Speed Timing Regenerated in Repeater

• High-speed signaling incurs no cumulative
  jitteror degradation
• Bit errors and non-compliant behavior are
  easilyisolated to a single link

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High-Speed Bus States/Levels
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USB 2.0 Transceiver Functionality
3.3V
Rpu_Enable
HS_Current_Source_Enable
HS_Drive_Enable
HS_Data_Driver_Input
High Speed Current Driver
Legacy Driver
Rs
LS/FS_Data_Driver_Input
Rpu
Assert_Single_Ended_Zero
FS_Edge_Mode_Sel
Rs
LS/FS_Driver_Output_Enable
Data
HS_Differential_Receiver_Output
Data-
HS Differential Data Receiver
Differential_Receiver_Enabled
Transmission Envelope Detector
Legacy_Differential_Receiver_Output
Legacy Data Receiver
HS_Disconnect_Detected
Disconnection Envelope Detector
SE_Data_Receiver_Output
Single Ended Receivers
SE_Data-_Receiver_Output
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High-Speed Current Driver

• Directing current to ground is fast but wastes
  power
• Turning current on/off saves power but requires
  settling time
• Use of these two options is left to the designer

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RPU Switch

• When device enters high-speed mode, RPU is
  disconnected
• It is recommended that switching elements be
  attached to both lines to achieve balanced
  parasitics

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High-Speed DifferentialData Receiver

• Required to receive differential signaling with
  amplitude as small as /- 200mV
• Guideline Tolerant of common mode voltages from
  50mV to 600mV
• Reception of data is qualified by envelope
  detection

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Transmission Envelope Detector
Differential
!Squelch

• Must indicate Squelch when differential
  amplitudeis lt 100mV
• Must indicate !Squelch when differential
  amplitudeis gt 150mV
• Must incorporate filtering to prevent indication
  ofSquelch during crossover
• Should react in less than 4 bit times

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Disconnection Envelope Detector

• Disconnect threshold detector goes high when
  signals above disconnect threshold are detected
• Output is sampled during last 8 bits of 40 bit
  uSOF EOP
• This prevents spurious disconnect detection in
  the presence of allowable signaling overshoot