An Accumulator Architecture: the 8051

1
An Accumulator Architecture the 8051

• 8051 is an accumulator architecture (not a pure
  one)
• Theres one register, the accumulator (ACCU),
  that is both source and destination register of
  most operations
• ADD A,ADDRESSB A A MemADDRESSB
• Registers are 8 bits wide
• Special instructions
• add with carry
• subtract with borrow
• Despite its age still often used in calculators,
  digital clocks, VCRs, etc.

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8051 Memory
8051
external RAM
? 64 KB
internal RAM
128 B
SFRs
128 B
internal code mem.
external code mem.
? 64 KB
3
8051 Internal RAM
Address
Register Set 0
00
Register Set 1
08
Register Set 2
10
Register Set 3
18
20
Bit Addressable
28
30
38
40
48
RAM stack
50
58
60
68
70
78

• Which set of 8 registers is being used depends on
  2 bits in the Program Status Word (PSW)

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8051 SFRs
Address
80
P0
SP
DPL
DPH
PCON
88
TCON
TMOD
TL0
PL1
TH0
TH1
90
P1
98
SCON
SBUF
a0
P2
a8
IE
b0
P3
b8
IP
c0
c8
d0
PSW
d8
e0
ACC
e8
f0
B
f8
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8051 Addressing Modes

• Immediate operand is constant contained in
  instruction
• ADD A,31
• or
• NDAYS EQU 31
• ...
• ADD A,NDAYS
• Register operand is register
• ADD A,R0
• Direct operand is memory cell whose address is
  contained in instruction
• COUNT EQU 30H address of COUNT in internal RAM
• ...
• MOV COUNT,11 Mem30H (COUNT) 11

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8051 Addressing Modes

• Register indirect operand is memory cell whose
  address is contained in register
• Restrictions
• only 8-bit registers R0 and R1, and 16-bit
  register DPTR may be used
• Examples
• EVENTS EQU 30H address of EVENTS in internal
  RAM
• ...
• MOV R1,EVENTS R1 address of EVENTS
• INC _at_R1
• or
• TABLE EQU 4000H base address of TABLE in ext.
  RAM
• ...
• MOV DPTR,TABLE DPTR address of TABLE
• MOVX _at_DPTR,A MemDPTR A

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8051 Addressing Modes

• Indexed operand is memory cell whose address is
  the sum of two registers
• Restrictions
• only applies to MOVC (move constant/move from
  code mem.) and JMP instructions
• MOVC A,_at_ADPTR
• MOVC A,_at_APC
• JMP _at_ADPTR
• Example 1, read from constant table
• MOV A,2 want TABLE2
• INC A skip instr. before table
• MOVC A,_at_APC A TABLE2
• AJMP OVERTAB jump over TABLE
• TABLE DB 2,3,5,7
• DB 11,13,17,19
• OVERTAB

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8051 Addressing Modes

• Indexed
• Example 2, implementing case/switch statement
  using jump table
• MOV DPTR,TABLE DPTRaddress of TABLE (CM)
• MOV A,INDEX A index
• RL A A 2
• JMP _at_ADPTR the jump itself
• ...
• TABLE AJMP CASE0
• AJMP CASE1
• AJMP CASE2
• ...

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8051 Arithmetic Instructions
Instruction Mnemonic Meaning increment INC A
regdirindirDPTR oper decrement DEC Aregdir
indir oper-- add ADD A,regdirindirimm AAo
per add with carry ADDC A,regdirindirimm AAop
erC sub. with borrow SUBB A,regdirindirimm AA
-oper-C multiply MUL AB B,A
AB divide DIV AB A A/B B
AB decimal adjust DA A A(hex)
A(dec)
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8051 Logical Instructions
Instruction Mnemonic Meaning bitwise
AND ANL A,regdirindirimm AAoper ANL dir,A
imm dirdiropr bitwise OR ORL A,regdirindir
imm AAoper ORL dir,Aimm dirdiropr bitwi
se XOR XRL A,regdirindirimm AAoper XRL di
r,Aimm dirdiropr clear CRL A A0 complem
ent CPL A AA rotate left RL A rot left
w carry RLC A rotate right RR A rot right w
carry RRC A swap SWAP A A03lt-gt
A47
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8051 Copy and Transfer Instructions
Instruction Mnemonic Meaning move MOV
A,regdirindirimm A oper MOV
reg,Adirimm reg oper MOV
dir,Aregdirindirimm dir oper MOV
indir,Adirimm indir oper MOV
DPTR,imm16 DPTR imm16 push PUSH dir oper
on stack pop POP dir oper of
stack exchange XCH A,regdirindir A lt-gt
oper XCHD A,indir A03 lt-gt
oper03 move extern MOVX A,_at_reg_at_DPTR A
oper MOVX _at_reg,A oper A MOVX
_at_DPTR,A oper A mv code mem MOVC
A,_at_ADPTR_at_APC A oper
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8051 Boolean Instructions
Instruction Mnemonic Meaning and ANL
C,bit/bit C C oper or ORL C,bit/bit C
C oper move bit MOV C,bit C bit MOV
bit,C bit C clear bit CLR C C 0 CLR
bit bit 0 set bit SETB C C 1 SETB
bit bit 1 complement CPL C C !C CPL
bit bit !bit

• Bit addressing can only be applied to internal
  RAM addresses 20H-2FH and SFR addresses that end
  at 0 or 8
• Assembler uses following notation to specify bit
  addresses
• 0E0H.7 most significant bit of ACCU
• 0D0H.4 bit 4 of PSW

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8051 Jump Instructions
Instruction Mnemonic Meaning jump unc. SJMP
reladdr PC PC /- 127 AJMP addr11 PC
PC1511addr11 LJMP addr16 PC
addr16 JMP _at_ADPTR PC ADPTR call
unc. ACALL addr11 push PC PC
PC1511addr11 LCALL addr16 push PC, PC
addr16 return RET pop PC, goto PC (from
subroutine) RETI (from interrupt) no
operation NOP PC PC1 jump cond. JC
reladdr PC PC /- 127 if C JNC reladdr PC
PC /- 127 if !C JB bit,reladdr PC PC
/- 127 if bit JNB bit,reladdr PC PC /-
127 if !bit JBC bit,reladdr PC PC /- 127 if
bit, bit 0 JZ reladdr PC PC /- 127
if A0 JZ reladdr PC PC /- 127 if A!0
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8051 Jump Instructions
Instruction Mnemonic Meaning decrjmp DJNZ regd
ir,reladdr reg-- dir--, PC PC /- 127
if regdir!0 compjmp CJNE A,dirimm,relad
dr PC PC /- 127 if A!opr CJNE reg,imm
,reladdr PC PC /- 127 if
reg!imm CJNE indir,imm,reladdr PC PC /- 127
if indir!imm
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Example 1

• RESULT (P Q - R 1) - (S T)
• P,R,T variables
• Q,S constants
• Q EQU 14 declare Q
• S EQU 22 declare S
• P EQU 40H address P in int. RAM
• R EQU 41H address R
• T EQU 42H address T
• RESULT EQU 43H address RESULT
• COMPUT MOV A,P A P
• ADD A,Q A PQ
• CLR C clear carry
• SUBB A,R A PQ-R
• INC A A PQ-R1
• XCH A,R1 R1 A
• MOV A,S A S
• ADD A,T A ST
• XCH A,R1 A PQ-R1, R1 ST

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Example 2

• if (P gt 10) Q 1
• ORG 0H start address of program
• P EQU 40H address P in int. RAM
• Q EQU 41H address Q
• MOV R2,P R2 P
• CJNE R2,10,ONGEL if (P!10) goto ONGEL
• SJMP ENDIF if (P10) goto ENDIF
• ONGEL JC ENDIF if (Plt10) goto ENDIF
• THEN MOV Q,1 Q 1
• ENDIF ...
• END
• CJNE op1,op2,label sets carry bit if op1 lt op2,
  otherwise cleared
• Alternative implementation
• MOV A,10
• SUBB A,P C Pgt10
• JNC ENDIF if (Plt10) goto ENDIF

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Example 3

• if (PltQ)
• Q Q-P
• else
• P P-Q
• ORG 0H
• P EQU 40H
• Q EQU 41H
• MOV A,P A P
• CJNE A,Q,ONGEL if (P!Q) goto ONGEL
• SJMP THEN if (PQ) goto THEN
• ONGEL JNC ELSE if (PgtQ) goto ELSE
• THEN MOV A,Q
• CLR C
• SUBB A,P
• MOV Q,A
• SJMP ENDIF
• ELSE SUBB A,Q
• MOV P,A

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Example 4

• while (R gt N)
• Q
• R R-N
• ORG 0H
• R EQU 40H
• Q EQU 41H
• N EQU 42H
• MOV A,R
• WHILE CJNE A,N,ONGEL
• SJMP BODY
• ONGEL JC ENDWH
• BODY INC Q
• SUBB A,N
• SJMP WHILE
• ENDWH MOV R,A
• END

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Example 5

• for (I1 Ilt14 I)
• S SI
• ORG 0H
• S EQU 40H
• MOV R0,1
• MOV A,S
• FOR ADD A,R0
• INC R0
• CJNE R0,14,ONGEL
• SJMP FOR
• ONGEL JC FOR
• ENDFOR MOV S,A
• END

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Subroutines

• 8051 stack grows from low addresses to high
  addresses
• SFR SP (address 81H) points to top of stack,
  i.e., if you push a value onto the stack, it will
  be stored at address SP1
• Be careful SP is initialized to 07H, alternate
  register banks 1, 2, and user bit vars occupy
  internal RAM addresses 08H-2FH
• Special instructions
• PUSH op
• POP op
• op must be specified using direct addressing!

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Example parameter-less subroutine

• There is an instruction INC DPTR, but for some
  odd reason no DEC DPTR
• ...
• ACALL DECDPTR
• ...
• ACALL DECDPTR
• ...
• DECDPTR MOV A,82H A DPL
• JNZ NBOR if (DPL!0) goto NBOR
• DEC 83H DPH--
• NBOR DEC 82H DPL--
• RET return

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Parameter passing

• Options for parameter passing
• In internal memory
• In registers. Not really useful, because
  registers are part of (and thus as fast as)
  internal memory
• On stack. Also not really useful because push and
  pop instructions allow only direct addressing.
  Necessary for implementing recursive functions
  (but because stack is at most 128 bytes,
  recursion depth must be limited).
• In external memory. Disadvantages (1) slow, (2)
  can only be accessed via DPTR register

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Passing parameters in internal RAM

• byte doit(byte N)
• return N15
• DOITN EQU 40H address formal parameter N
• DOITR EQU 41H address DOIT result
• ACC EQU 0E0H address SFR A
• ARG EQU 50H address argument
• ...
• MOV DOITN,ARG copy arg to formal param
• ACALL DOIT call DOIT
• ...
• DOIT PUSH ACC save ACCU
• MOV A,DOITN A N
• ADD A,15 A N15
• MOV DOITR,A result N15
• POP ACC restore ACCU
• RET

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Passing parameters in internal RAM

• void swap(byte I, byte J)
• byte TMP I
• I J
• J TMP

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Passing parameters in internal RAM

• SWAPI EQU 40H address formal parameter I
• SWAPJ EQU 41H address formal parameter J
• ACC EQU 0E0H address SFR A
• ARGI EQU 50H address argument 1
• ARGJ EQU 51H address argument 2
• ...
• MOV SWAPI,ARGI copy arg 1
• MOV SWAPJ,ARGJ copy arg 2
• ACALL SWAP call SWAP
• ...
• SWAP PUSH ACC save ACCU
• MOV A,R0 save R0
• PUSH ACC
• MOV A,R1 save R1
• PUSH ACC
• MOV R0,SWAPI R0 I
• MOV R1,SWAPJ R1 J
• MOV A,_at_R0 A (TMP) I
• XCH A,_at_R1 J A, A J

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Java Virtual Machine (JVM)

• Translation versus interpretation
• Suppose machine language is L0 and we want to
  execute program written in L1
• Translation Replace L1 instructions by
  equivalent L0 instruction(s). Execute L0
  instructions
• Interpretation Write program in L0 that takes L1
  programs as input and executes them by examining
  each L1 instruction in turn and executes them by
  executing the equivalent L0 instructions directly
• Java programs are almost always interpreted
• Machine language of the JVM is called Java
  bytecode (so called because all opcodes are one
  byte)

Java bytecode
Java program
Java compiler
JVM (interpreter)
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Stack Architecture

• JVM follows stack model of execution
• operands are pushed onto stack from memory and
  popped off stack to memory
• operations take operands from stack and place
  result on stack
• Example (not real Java bytecode)
• a bc
• push b
• push c
• add
• pop a

b
c
b
bc
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JVM Architecture

• For each method invocation, the JVM creates a
  stack frame consisting of
• Local variable frame Parameters and local
  variables, numbered 0, 1, 2,
• Operand stack stack used for evaluating
  expressions

local var 0
local var 1
local var 2
local var 3
static void add3(int x, int y, int z) int r
xyz System.out.println(r)
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Some JVM instructions

• iload_n push local variable n onto the stack
• iconst_n push constant n onto the stack
  (n-1,0,...,5)
• bipush imm8 push byte onto stack
• sipush imm16 push short onto stack
• istore_n pop word from stack into local variable
  n
• iadd, isub, ineg, imul, idiv, irem usual
  arithmetic operations
• if_icmpXX offset16 (XX can be eq, ne, lt, gt, le,
  ge)
• pop word off stack into a
• pop word off stack into b
• if (b XX a) PC PC offset16
• goto offset16 PC PC offset16

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Example 1

• Translate following expression to Java bytecode
• v 3(x/y - 2/(uy))
• assume x is local var 0, y local var 1, u local
  var 3, v local var 4
• Stack
• iconst_3 3
• iload_0 x 3
• iload_1 y x 3
• idiv x/y 3
• iconst_2 2 x/y 3
• iload_3 u 2 x/y 3
• iload_1 y u 2 x/y 3
• iadd uy 2 x/y 3
• idiv 2/(uy) x/y 3
• isub x/y - 2/(uy) 3
• imul 3(x/y - 2/(uy))
• istore_4 v 3(x/y - 2/(uy))

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Example 2

• Translate following Java code to Java bytecode
• if (x lt 2) x 0
• assume x is local var 0
• Stack
• iload_0 x
• iconst_2 2 x
• if_icmpge endif if (xgt2) goto endif
• iconst_0 0
• istore_0
• endif
• ...