Federal%20University%20of%20Santa%20Catarina%20-%20UFSC

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Federal University of Santa Catarina - UFSC
Post-graduation in Electrical Engineering -
PPGEEL
Power Electronics Institute - INEP
Master Thesis Presentation
Study and Design of a Voltage Line Conditioner
with Serial Compensation and Fed by Load Side
Eng. MSc Thiago Batista Soeiro
July, 2007
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Presentation Contents
Introduction
Voltage Line Conditioner Power Stage
Voltage Line Conditioner Control Stage
Experimental Results
Conclusions
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Motivations
1- The increase of voltage-sensitive equipments
results in greater demand for high-quality
voltage sources
2- The existence of standards limiting the
harmonic pollution in electric power system
3- To aid the national industries in the
development of high-quality voltage sources.
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Main Objectives
1- To study concepts and topologies of voltage
line conditioners
2- To establish general voltage compensation
methods to be applied in voltage line
conditioners
3- To evaluate the performance of the topology
proposed under unbalanced and distorted system
voltages
4- To study and formulate control techniques to
provide the conditioning of the load voltage
5- To develop and test a voltage line conditioner
prototype to validate the analysis.
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Important Concepts
The Studied Topology was based on two concepts
The Principle of Serial Voltage Compensation,
applied in Stabilizers in 1950 by Patchett
Indirect ac-ac Converter with Direct link
presented by Bong-Hwan Kwon in 2002
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Important Concepts
The Voltage Line Conditioner Operation Principle
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Voltage Line Conditioner Power Stage
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Modulation Strategy
PWM Inverter (S5 - S8)
Bidirectional Rectifier (S1 - S4)
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Main Waveforms
3 Level PWM Modulation
Rectifier
Inverter
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Main Analytical Expression
Converters Static Gain
Transformation ratio
Current ripple
Voltage ripple
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Voltage Line Conditioner Control Stage
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Mathematical Model
Small signals model G(s), Transfer
Function of output voltage vs. duty cycle
F(s), Transfer Function of output voltage
vs. input voltage .
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Conditioner Analytical Study
Load Influence over circuits dynamic
response
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Conditioner Analytical Study
There are some strategies to damp the voltage
oscillation or compensate the absence of load

To damp voltage oscillation with virtual
resistance control strategy
To insert a control loop to compensate abrupt
voltage drop
To insert input filter topologies