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make: the good, the bad, and the ugly

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make: the good, the bad, and the ugly Dan Berger dberger_at_cs.ucr.edu Titus Winters titus_at_cs.ucr.edu Outline What is make, and why do you care? Key concepts makefiles ... – PowerPoint PPT presentation

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Title: make: the good, the bad, and the ugly


1
make the good, the bad, and the ugly
  • Dan Berger dberger_at_cs.ucr.edu
  • Titus Winters titus_at_cs.ucr.edu

2
Outline
  • What is make, and why do you care?
  • Key concepts
  • makefiles, targets, directives variables.
  • A simple makefile
  • Implicit variables
  • A better makefile
  • Words of caution

3
What is Make?
  • The make utility automatically determines
    which pieces of a large program need to be
    recompiled, and issues commands to recompile
    them.
  • -- The GNU Make Manual

4
Why Do I Care?
  • Lets say I have a program with only one source
    file simple.cc.
  • Creating the program is easy
  • g ltflagsgt simple.cc o simple
  • What if I have 10 source files?
  • g ltflagsgt s1.cc s10.cc o simple
  • If I change two of them?

5
Incremental Compilation
  • If I know which two Ive changed, I can recompile
    them (into objects) and re-link the executable.
  • Figuring out the minimum number of steps that
    must be performed is what make is good at.

6
How Does Make Work?
  • You tell make what files your program depends on
    some that you provide (the source) and some
    that the compiler provides (objects).
  • You tell make how to run the compiler, and
    finally how to assemble all those files into the
    program.
  • When things change, make decides what commands
    need to be run to bring your program up to date.

7
For the Technically Minded
  • Make constructs a dependency graph
  • what targets depend on what other targets
  • how do I construct a given target
  • When you invoke Make for a specific target, it
    visits the graph, performing the needed commands
    to produce the thing you asked for.

8
Its not Just for Programs Anymore
  • Make isnt just good for compiling programs
    its good for figuring out what commands to run
    to perform some task.
  • Time permitting, well give non-programming
    examples of make later.

9
Key Concepts Makefile
  • Make needs instructions on how to decide what to
    do by convention, these instructions are stored
    in a file called Makefile.
  • Its just a convention the f flag to make will
    tell it to look at a specific file for its
    instructions.
  • Makefiles (regardless of their filename) have a
    specific format

10
Basic Makefile Format
  • comment line
  • variable-name value
  • target dependencies
  • ltTABgtdirective
  • The ltTABgt is critical it cant be spaces, it
    must be a tab. Emacs has a makefile mode and
    will warn you if it finds an obvious error.

11
Make Targets
  • The first part of a rule the thing make is
    trying to make.
  • Generally (but not always) a file a .o, for
    example.
  • Targets have a (possibly empty) list of
    dependencies other targets that this target
    depends on.

12
Directives
  • The final part of a rule tells make what
    command(s) to run to create this target.
  • Generally the compiler for whatever language
    youre working in.

13
Variables
  • If you dont know what a variable is, time to
    review CS5/10.
  • Make variables look a lot like variables in SH.
  • Assignment VARNAMEValue
  • Reference VARNAME, or (VARNAME)

14
Makefile.ex1
  • three rules to build simple
  • all simple
  • simple simple.o
  • ltTABgtg -W w Wall Werror pedantic \
  • -o simple simple.o
  • simple.o simple.cc
  • ltTABgtg -W w Wall Werror pedantic \
  • -c -o simple.o simple.cc

15
Makefile.ex2
  • CPPFLAGS-W w Wall Werror pedantic
  • CXXg
  • all simple
  • simple simple.o
  • ltTABgtCXX o simple simple.o
  • simple.o simple.cc
  • ltTABgtCXX CPPFLAGS o simple.o c \ simple.cc

16
Implicit Rules Their Variables
  • Make has a slew of implicit rules for example,
    it knows how to turn a .cc file into a .o file
    without you telling it.
  • To make these implicit rules flexible, make uses
    a range of built-in variable names in them.
  • If you assign to these variables, make will
    insert those values into the rules.

17
Some Built In Variables
  • CC the C compiler
  • CFLAGS flags for the C compiler
  • CXX the C compiler
  • CPPFLAGS any guesses?
  • LD the linker
  • LDFLAGS lets not see the same hands

18
Makefile.ex3
  • CPPFLAGS-W w Wall Werror pedantic
  • all simple

19
Having Make Figure Out Dependencies
  • Makefile.ex3 only works for single file projects.
  • Real projects have more than one file, and those
    files have to be built in a specific order.
  • Make (with some help from the compiler) can
    figure out that order for you.

20
Makefile.ex4
  • CCCXX
  • SOURCE simple.cc
  • .dependSOURCE
  • ltTABgt_at_set e (CC) MM CPPFLAGS \
  • SOURCE \
  • sed s/\(\)\.o /\1.o /g \
  • gt .depend -s _at_ rm f _at_
  • -include .depend

21
Say What?
  • If you really want to know how/why it works I
    encourage you to go figure it out.
  • Read the make manual
  • Read the sed man page
  • See if you can figure out whats going on.

22
Having Make Find The Source
  • Thanks to some nifty tricks built into (gnu) make
    you often dont even need to tell make what the
    source files are.
  • You might think you could do
  • SOURCE .cc
  • But thats not what you want. What you want
  • SOURCE (wildcard .cc)

23
Why Not SOURCE.cc?
  • The trouble with saying
  • SOURCE .cc
  • Is that make doesnt evaluate that wildcard
    during variable assignment, it will expand it
    when the variable is used in a target or command.
  • SOURCE (wildcard .cc)

24
Two Forms of ??
  • There are two different assignment operators in
    Make
  • is a deferred assignment its evaluated
    when make is actually running commands.
  • is an immediate assignment its evaluated
    when make is reading makefiles and deciding what
    to do.
  • the distinction is subtle, and can be confusing.

25
Next Step Figuring out the Objects
  • Wouldnt it be nice if we could tell make the
    list of objects is the list of source files, but
    replace .cc with .o ?
  • We can, like this
  • OBJS (patsubst .cc,.o,(wildcard .cc))
  • Or this
  • OBJS (SOURCE.cc.o)

26
So What Do We End Up With?
  • CCCXX
  • CPPFLAGS-w W Wall Werror pedantic
  • CPPFLAGS -g
  • LDFLAGS
  • SOURCE (wildcard .cc)
  • OBJS (patsubst .cc,.o,(wildcard .cc))
  • TARGET simple
  • all TARGET
  • TARGET OBJS
  • .depend

27
So Whats Not To Love?
  • Makefile syntax is ugly especially the fact
    that TABs have to be TABs.
  • While make has been ported to many operating
    systems, its easy to write Makefiles that arent
    portable.
  • That sed trick, for example, wont work on
    Windows.
  • Many have tried to fix make few of those
    efforts have survived.

28
Learning More
  • info make
  • google for make tutorial
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