CSE 3322 Computer Architecture - PowerPoint PPT Presentation

About This Presentation
Title:

CSE 3322 Computer Architecture

Description:

CSE 3322 Computer Architecture Dr. John Patterson 614 NH Office Hours: M , W 11 12 noon 817-272-3679 john.patterson_at_uta.edu Grading Policy: Project 25% – PowerPoint PPT presentation

Number of Views:81
Avg rating:3.0/5.0
Slides: 35
Provided by: JohnP348
Learn more at: https://crystal.uta.edu
Category:

less

Transcript and Presenter's Notes

Title: CSE 3322 Computer Architecture


1
CSE 3322 Computer Architecture
Dr. John Patterson
614 NH Office Hours M , W 11 12 noon
817-272-3679
john.patterson_at_uta.edu
Grading Policy
Project 25
Exam I 25
Exam II 25
Exam III 25 Homework
5 add on Turn in start of class no late
homework
2
CSE 3322 Computer Architecture
Course WEB SITE crystal.uta.edu/jpatters Read
Chapter 1 Computer Organization and Design
3
If we dont succeed, we run the risk of
failure.
Bill Clinton
4
CSE 3322 Computer Architecture
The Low Level knowledge needed by High Level
Programmers and Systems Designers
5
Five Components of Computers
Memory
Control
Input
Datapath
Output
Processor
6
Input Instructions
Memory
Control
Input
CAB
A
Datapath
Output
B
C
7
Fetch Instructions
Memory
Control
Input
CAB
ADD A,B
A
Datapath
Output
B
C
8
Fetch Operands
Memory
Control
Input
CAB
ADD A,B
A
Datapath
Output
B
C
A,B
9
Execute Command
Memory
Control
Input
CAB
ADD A,B
A
Datapath
Output
B
C
AB
10
Store Results Output
Memory
Control
Input
CAB
ADD A,B
A
Datapath
Output
B
AB
AB
11
Some Architecture Considerations
Integer or Floating Point
Number of Operands
Memory
Control
Input
CAB
ADD A,B
A
Datapath
Output
B
AB
AB
12
Architecture Design Criteria
  • Performance

13
Architecture Design Criteria
  • Performance
  • Hardware Costs

14
Architecture Design Criteria
  • Performance
  • Hardware Costs Performance

15
Architecture Design Criteria
  • Performance
  • Hardware Costs Performance
  • Instruction Complexity

16
Architecture Design Criteria
  • Performance
  • Hardware Costs Performance
  • Hardware Software Trade-Offs
  • Instruction Complexity

17
Architecture Design Criteria
  • Performance
  • Hardware Costs Performance
  • Hardware Software Trade-Offs
  • Etc., Etc., Etc.
  • Instruction Complexity

18
Evolution of Registers in Datapath
Accumulator
Ex 32 Flip-Flops
A
ADD 300 Add the contents of memory location
300 to the Accumulator A Memory300 A
19
Evolution of Registers in Datapath
Accumulator
Ex 32 Flip-Flops
A
ADD 300 A Memory300 A
Special Registers were added with special
functions
20
Evolution of Registers in Datapath
Accumulator
Ex 32 Flip-Flops
A
ADD 300 A Memory300 A
Models or Abstractions
Special Registers were added with special
functions
21
Evolution of Registers in Datapath
  • 32 General Purpose Registers

22
Evolution of Registers in Datapath
  • 32 General Purpose Registers
  • Called a Load-Store or Register-Register machine

23
Evolution of Registers in Datapath
  • 32 General Purpose Registers
  • Called a Load-Store or Register-Register machine
  • All Registers can be used for any purpose

24
Evolution of Registers in Datapath
  • 32 General Purpose Registers
  • Called a Load-Store or Register-Register machine
  • All Registers can be used for any purpose
  • Ex Add any two Registers and put the result in a
    third Register

25
Instruction Set Architecture
  • Consists of All of the Instructions and How Each
    Works

26
Instruction Set Architecture
  • Consists of All of the Instructions and How Each
    Works

Models or Abstractions
27
Instruction Set Architecture
  • Consists of All of the Instructions and How Each
    Works
  • Is the Interface Between Hardware and Software

28
Instruction Set Architecture
  • Consists of All of the Instructions and How Each
    Works
  • Is the Interface Between Hardware and Software
  • Defines the Functionality

29
Instruction Set Architecture
  • Consists of All of the Instructions and How Each
    Works
  • Is the Interface Between Hardware and Software
  • Defines the Functionality
  • Determines the Inherent Performance

30
Instruction Set Architecture
  • Consists of All of the Instructions and How Each
    Works
  • Is the Interface Between Hardware and Software
  • Defines the Functionality
  • Determines the Inherent Performance
  • Determines the Software Compatibility

31
Software Hierarchical Layers
Machine Instruction
101110001100010000001
32
Software Hierarchical Layers
Assembly Language add 2, 5,2
Assembler
Machine Instruction
101110001100010000001
33
Software Hierarchical Layers
High Level Language g h A8
Compiler
Assembly Language add 2, 5,2
Assembler
Machine Instruction
101110001100010000001
34
Software Hierarchical Layers
High Level Language g h A8
Models or Abstractions
Compiler
Assembly Language add 2, 5, 2
Assembler
Machine Instruction
101110001100010000001
Write a Comment
User Comments (0)
About PowerShow.com