How to realize many-input AND gates

1
How to realize many-input AND gates
a
b
c
d
We need just one row to create all three-input
ANDs
0
0
0
X
cd
ab
abc?X
acd ? abc ? X
2
3-input AND gate realizable with one ancilla bit
that can be reused by other AND gates
a
a
b
b
c
c
0
0
abc?X
X
X
ab
abc?X
3
An example
a
b
c
d
e
g
g
f
(g ? abc) ? abcg
g? abc
(g ? abc)de ? f
(g ? abc)de ? f ? deg abcde ? f
Conclusions 1. Every function of type abcde? f
is realizable with n1 bits. 2. Every ESOP with
n bits and one output is realizable in n1 bits.
4
Warning for Maslov
a
b
c
d
e
g
f
Toffoli gate for 5 inputs in product requires in
last slide 4 of these gates.
So, Toffoli gate for 5 inputs in product requires
34 12 gates.
Each of these gates costs 3 Toffoli.
Concluding. When Maslov tells cost 1 it may be
cost 12.
5

• Main Problems in cascade design

1. Portland Quantum Logic Group, since 2001. Concept
   of cascades. Search from inputs, outputs,
   bidirectional. A Search, GA. Many types of
   restricted gates. Exhaustive search. Multi-valued
   reversible logic.
2. Maslov, Dueck, Miller University of New
   Brunswick, since 2002. Simple heuristic allowed
   to find good results for unlimited gate model.
   Because they use unlimited gate model, they do
   not worry about Markovs theorem.
3. Shende, Markov, Hayes, University o0f Michigan,
   since 2002. Important theorem about odd and even
   functions. This theorem explains lack of success
   of our early approach for some functions.
4. Niraj Jha and Abhinav Agarwal. Princeton
   University, since 2004. Best results so far (for
   unlimited model?)

6
Previous research in cascades.

1. (Perkowski, Mishchenko, Khlopotine, Kerntopf,
   2001-2002) If I improve the Hamming Distance (HD)
   with every gate selected then finally the HD
   becomes 0, function becomes an identity and I
   have a solution.
2. Goal select the best gate greedy algorithm.

• Drawback. In some situations there is no gate to
  select, all gates worsen the HD.
• We are in the local point in search space from
  which all selections worsen the HD

We are here and we are stuck. Every gate
selection worsens HD
solution
7
Previous research in cascades.

1. Example. abc?d.
2. I need to flip only two bits but I cannot do this
   since I could do this only with products that
   have three literals.

8
Maslov, Dueck and Miller

• 1. Every function is realizable with DMM
  algorithm.
• Drawback. They assume gates like abcd?e which
  require internal constants.
• It can be shown that the minimum of these
  constants is one. A simpler circuit uses more
  constants.
• Therefore their method of counting costs of gates
  is not fair.
• However, this assumption causes that algorithm is
  always convergent.
• Drawback. It is convergent with often very
  non-minimal costs and then they need another
  algorithm to improve the result by local
  optimizations.

9
Markov
For n3 every function is realizable with
Toffoli, NOT and Feynman.
He considers only functions Toffoli with 3
inputs, Feynman and NOT. He does not use Toffoli
with n inputs, as Maslov uses.
Main Markov Theorem

• If function is even, then it is realizable in n
  levels.
• If the function is odd (as abc?d) then it
  requires one more ancilla bit. So n1 bits are
  needed for EVERY function of n variables.

10
Conclusion
For ngt4 we assume all Toffoli with 3 inputs but
on all wires, NOT on all wires and all Feynman
with 2 inputs on any two wires. This is the same
as Markov (but we also assume other gates),
different than Maslov.
Using Markov result, if the function is odd we
need to add one more wire. (Maslov and Jha do not
do this because they have unlimited gate model).
Our results take less literals and often also
less gates
11
Conclusion
Our method is potentially better if we solve the
non-convergence problem for some functions.
Other method is to keep adding more ancilla bits.
Combine various search models

• We are using all kinds of other gates, while
  their approaches still use only Toffoli, Feynman,
  NOT (just recently they add more).

12
Transformation Rules for Designing
CNOT-basedQuantum Circuits

• Kazuo Iwama, Yahiko Kambayashi
• and Shigeru Yamashita
• Quantum Computation and Information, ERATO, JST
• Kyoto University, NTT

13
Quantum Computing (QC)

• Computing paradigm based on quantum physics
• Shors algorithm for prime factorization
• Grovers algorithm for database search

QC is still in experimental phase, but, the
above algorithms time complexities are much
better than classical counterparts
To perform quantum computing efficiently,
We need to design efficient Quantum Circuit for
a Boolean function for the given problem
14
Quantum Circuit
quantum gates operation to qubits
x1ñ
x2ñ
x3ñ
time
x4ñ
Control bit x2 x3
Target bit x4
qubit

• Control NOT (CNOT)
• If all the control bits are 1ñ then target bit
  1ñ 0ñ

• ñ b ñ
• a 1ñ b 0ñ

15
How a CNOT Gate works
NOT
x2x3
x1ñ
x1ñ
Our notation for CNOT with XOR in wire 4
x2ñ
x2ñ
CNOT3
X
x3ñ
x3ñ
x4ñ
x4ñ
x4Åx1x2Åx2x3ñ
x4Åx1x2ñ
CNOT4
Just add an exor term to the target bit
However, we cannot have a wire in QC
16
Quantum Boolean Circuit (QBC)
x1ñ
x1ñ
x2ñ
x2ñ
xnñ
xnñ
xn1ñ
xn1Åf (x1¼ xn)ñ
0ñ
xn2ñ0ñ
0ñ
xn3ñ0ñ
Can be used in a Quantum Algorithm
Auxiliary bits
17
Why Local Transformation?

• Resolution Proof
• - prove a given CNF is 0 by transformations

(x1x2x3) (x1x3)(x1x2x3)(x2x3)(x1x2)
0 (nil clause) ?

• Automated Logic Design
• - optimize a given circuit by transformations

These are based on local transformation rules for
Boolean formulas (AND/OR/NOT)
18
Motivation Local Transformations for QBC?
In the quantum world, using AND/OR is not so good
CNOT gates (with many control bits) are better
logical primitives
Can we enjoy a similar concept (local
transformation rules) for CNOT gates worlds?
We start with complete local transformation
rules for design methodology of CNOT based
circuits
19
What we have done
Complete Local Transformation Rules for QBCs

• Quantum Boolean Circuits with CNOT Gates
• Canonical Form
• Local Transformation Rules
• Transformation Procedure to Canonical Form

C1 Û S1 S2 Û C2
If C1 and C2 are equivalent, we can transform C1
Û C2 systematically
20
Reduction to canonical form
C1 C2
noncanonical
S1 S2
canonical
If C1 and C2 are equivalent, we can transform C1
Û C2 systematically
21
Reduction to canonical form
C1 C2
noncanonical
canonical
S1
If C1 and C2 are equivalent, we can transform C1
Û C2 systematically
22
Transformations used for optimization and formal
verification
x1
x2
x3
x4
x5
x6
x7

• Transformation
• Equivalence Check

23
Canonical Form
All Boolean Functions can be expressed by PPRM
(Positive Polarity Reed-Muller) form uniquely
f(x) x1x2 x3 1Å x1Åx2Åx3 Åx1x2 Åx2x3
Åx1x3Åx1x2 x3
x1ñ
x2ñ
x3ñ
w Å f(x)ñ
wñ
If we place CNOT gates lexicographically, we get
the canonical form of the circuit
24
Canonical Form of QBC
x1ñ
x1ñ
x2ñ
x2ñ
xnñ
xnñ
xn1ñ
xn1Åf (x1¼ xn)ñ
0ñ
xn2ñ0ñ
0ñ
xn3ñ0ñ
CNOTn1 in PPRM form
Auxiliary bits
25
Transformation to the Canonical Form
x1ñ
x2ñ
x3ñ
x4Åf(x)ñ
x4ñ
By swapping two adjacent gates, Move all CNOT4
to the left
Moving gates!
x1ñ
x2ñ
x3ñ
x4ñ
x4Å f(x)ñ
26
Transformation Procedure
Canonical Form
x1ñ
x1ñ
x2ñ
x2ñ
xnñ
xnñ
xn1Åf(x)ñ
xn1ñ
xn2ñ0ñ
xn2ñ0ñ
xn3ñ0ñ
xn3ñ0ñ
CNOTn
CNOTn1
We gather CNOTs with the same target bit
will disappear
Only CNOTn1 left Þ Canonical Form
27
Transformation Rule 1
x1ñ
x2ñ

x3ñ
x4ñ
Cancel repeated terms
x4Åx1x2Åx1x2 x4
28
Move CNOT4 to the left
Transformation Rule 2
x1ñ
x2ñ

x3ñ
x4ñ
Swap independent terms
condition
t1ÏC2, t2ÏC1
ti output of gate i Ci input of gate i
notation
29
Move CNOT4 to the left
Transformation Rule 3
added
x1ñ
x2ñ

x3ñ
x4ñ
x3ñ ? x4gt
condition
t1ÏC2, t2ÎC1
30
Move CNOT4 to the left
Transformation Rule 4
added
x1(x1 x2? x3) x1 x2 ? x1 x3
x4 ? x1 x2 ? x1 x3
condition
t1ÎC2, t2ÏC1
31
Move CNOT4 to the left
Transformation Rule 4 cont
C2
C1
t1
t2
Case 1 t1ÏC2, t2ÏC1 Rule 2 Case 2 t1ÏC2,
t2ÎC1 Rule 3 Case 3 t1ÎC2, t2ÏC1 Rule 4
Case 4 t1ÎC2, t2ÎC1 Impossible
32
Nontrivial case case 4
x1ñ
x2ñ
t1ÎC2, t2ÎC1
x3ñ
x4ñ
We cannot swap by using just one local rule
We use auxiliary bits to swap gates in this case
33
Transformation Rule 5
Û
yñ
0Åyñ yñ
0ñ
Auxiliary bit
Garbage, ancilla bit
34
Example How to Treat the Nontrivial Case
If we encounter case 4,
Rule 1 Rule 2
x1ñ
x2ñ
x3ñ
x4ñ
0ñ
35
Example How to Treat the Nontrivial Case
x1ñ
x2ñ
x3ñ
0ñ
Rule 5
x1ñ
x2ñ
x3ñ
0ñ
36
Example How to Treat the Nontrivial Case
x1ñ
x2ñ
x3ñ
0ñ
To the left
To the right
Rule 2, 3, 4
x1ñ
x2ñ
x3ñ
We can delete these added gates eventually
x4ñ
0ñ
37
What we discussed so far in this lecture?

• Quantum Boolean Circuit with CNOT gates
• Canonical form
• Transformation Rules for QBCs

Future Work (it was a question asked in 2002)

• The notion of minimum circuit
• How to get the minimum circuit

38
Examples of applications of transformations
39
Example
Cost 602
Cost 188
40
Cost of CNOT gates

• Cost (1) 1
• Cost (2) 14
• Cost (3) 56
• Cost (4) 140
• Cost (m) 112(m-3) (m gt 4)

should be much higher cost for many inputs

• BBC95 shows constructions
• CNOT(2) gate by 14 basic gates
• CNOT(3) gate by 4 CNOT(2) gate
• CNOT(4) gate by 10 CNOT(2) gate
• Cost (m) gate by 8(m-3) CNOT(2) gate (m gt 4)

41
MotivationDesign Methodology
42
Computer Design Methodology
Classical
Quantum
For a given specification
Manually made libraries
Manually made libraries
Switch, Adder, MUX,
Hadamard Transformation, Fourier Transformation,
..
Control Logic (Boolean functions)
Control Logic (Boolean functions)
Target for Automatic Design
43
Design Methodology for Boolean functions
Classical
Quantum
For a given Boolean functions
Designing with AND/OR/NOT
Designing with CNOT gates
Technology independent
Technology independent
Mapping to the library of available gates
Mapping to the library of available gates
Technology dependent
Technology dependent
44
Design Methodology for Boolean functions
Classical
Quantum
Why AND/OR/NOT ?
Why CNOT gates ?
Good starting point for design
Good starting point for design
Fundamental concept
Motivation

• Standard Form
• (Sum-of-products forms)
• Transformation Rules

We want to establish a similar concept
Automatic Design
45
Why Only Boolean Function Parts?
The efficient construction of QBC is very
important for the implementation of QA
Because only Boolean function parts vary
depending on problems

• Boolean Oracles in Grover type algorithms
• Shor type algorithms
• Simulating classical calculations, etc.

Boolean function part can be simulated by
classical Boolean functions, but we cannot
utilize (classical) design methodology
46
Shor type QA (find r s.t. gr x mod p)
A
QFT
B
W-H
0ñ
f (a1¼ an, b1¼ bn, )ñ gA x--B mod pñ
0ñ
Vary depending on problem
47
More rules
48
Transformation Rule 6
Û
0ñ
Auxiliary bit
49
Transformation Example Shift(S, 2) is called.
Shift(S, 1) is called.
50
Step 1
We want to prove this simple fact
x1

x2
c1
c3
c2
x1
x2
0
0
0
a1
b1
a2
b2
a3
b3
Change the n-th control bit of ci to an unused
auxiliary bit by adding two gates ai and bi
51
About Step 1
Rule 2
x1
x2
0
Rule 5 to get the previous slide
52
Step 2
c1
c2
x1
x2
0
0
a1
b1
0
a2
b2
added
c1
c3
c2
x1
x2
0
0
a1
b1
0
b2
a3
b3
Move ai to the left (Rules 2 4)
53
Step 3
c1
c3
c2
x1
x2
0
0
a1
b1
0
a2
b2
a3
b3
c1
c3
c2
x1
x2
0
0
0
b3
Move bi to the right (Rules 2 3)
54
Step 4
x1
a2
a3
a1
x2
0
0
0
x1
a1
x2
a2
a3
0
0
0
for (i 2 to k) Move ai to the right
after a1 (Rule 2) Change the control of ai to
the ancilla bit 1 (Rule 5)
55
Step 5
x1
a1
x2
0
0
0
added
x1
a1
x2
0
g1
g3
g4
0
0
Here, we omit some redundant pairs of gates
for (each gi CNOTn) Move gi to the
right after a1 (Rules 2, 3, 4)
56
Step 6 (1/2)
CNOTn
CNOTn
x1
a1
x2
0
0
0
Step 6 (c)
Step 6 (b)
Step 6 (a) Reorder CNOTn lexicographically (Rule
2) Step 6 (b) Delete redundant gates by Rule
6 Step 6 (c) Delete redundant pairs of gates by
Rule 1
57
Step 6 (2/2)
Why disappear?
x1
a1
x2
0
0
0
Step 6 (a) Reorder CNOTn lexicographically (Rule
2) Step 6 (b) Delete redundant gates by Rule
6 Step 6 (c) Delete redundant pairs of gates by
Rule 1
58
About Step 6 (c)
g2(x)
x2 g1(x)
x1
a1
x2
0
0
0
disappear by Rule 6
? if some gates remain in g1(x), the final state
of x2 is x2 Å x2 g1(x) Å g2(x) this cannot be
x2 Åf(x)

Move the first gate to the right ? We can
move all CNOT2 to the left successfully
59
Step 7
CNOTn
x1
a1
x2
0
0
0
Move a1 to the right after all CNOTn (Rule 2)
60
Then Shift(S, 1) is called
Step 1
x1
x2
0
a2
b2
a1
b1
61
Shift(S, 1) Step 2
x1
x2
0
a1
b1
a2
b2
Step 2
x1
x2
0
b1
a1
b2
a2
62
Shift(S, 1) Step 3
x1
x2
0
b1
a1
b2
a2
Step 3
x1
x2
0
a1
b1
a2
added
63
Shift(S, 1) Steps 4 5
Step 5
x1
x2
0
a1
a2
added
64
Shift(S, 1) Steps 6 7
Step 6 7
x1
x2
0
a1
65
After All Shift(S, i) Step A 1/2
x1
while (each gi such that gi has ancilla bits and
the most left) Move gi to the left (Rule 2,
4) Delete gi (Rule 6)
66
After All Shift(S, i) Step A 2/2
x1
x2
0
0
0
0
0
Here, we omit some redundant pair of gates
while (each gi such that gi has ancilla bits and
the most left) Move gi to the left (Rule 2,
4) Delete gi (Rule 6)
67
After All Shift(S, i) Step B
x1
x2
0
0
0
0
0
Reorder gates (except for CNOTn)
lexicographically (Rule 2) Delete redundant pairs
of gates by Rule 1
68

• This was a very complex proof of a fact that
  could be easily proven from swap gate properties.
• Our goal was however to show the application of
  all the introduced transformation techniques.

69
Complex Rules Minimizing Example
70
Complex Transformation
C Í C1
We want to prove this by transformations
71
Complex Transformation (1)
A
A
C
C
xi
xi
xj
xj
By TR (1)
72
Complex Transformation (2)
added
A
A
C
C1
C
xi
xi
xj
xj
Move them by TRs (2) (3)
cancel
73
Complex Transformation (3)
Thus we proved what we wanted to prove
74
Our Strategy of using such transformation in more
complex circuits
Find the portion where the following
transformation can be applied
A
A
A
A
C1
C2
Ck
C
C Í Ci
k A gt SCk
75
Best Combination (a, d ), (b, e), (c, f )
76
Applying the transformation we get
(a, d )
(b, e)
(c, f )
x1
x2
x3
x4
x5
x6
x7
j
i
k
h
l
a
g
c
b
Now we can remove two pairs of columns
77
x1
x2
x3
x4
x5
x6
x7
g
a
b
c
l
To get solution with 6 gates
78
x1
x2
x3
x4
x5
x6
x7
g
a
b
c
m
n
l
By TR (1)
We insert a pair of columns
79
x1
x2
x3
x4
x5
x6
x7
g
a
b
c
m
n
l
Best Combination (a, m ), (b, g), (c, n)
80
x1
x2
x3
x4
x5
x6
x7
a
l
Best Combination (a, m ), (b, g), (c, n)
Again we remove two pairs of columns
81
x1
x2
x3
x4
x5
x6
x7
p
q
o
l
a
b
c
Best Combination (o, p), (b, c), (q, l)
82
Final result
83
Other Stuff
84
Simulating CNF Formulas
F (x1 x3) ( x1 x2 x3)
x1ñ
x1ñ
x2ñ
x2ñ
x3ñ
x3ñ
x4Å F ñ
x4ñ
x5ñ0ñ
x5ñ0ñ
auxiliary bits
x6ñ0ñ
x6ñ0ñ
p
g1
g2
G1
G2
G1
G2
85
x1ñ
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0
0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
x2ñ
x3ñ
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 1 0

• 000
• 0001
• 0010
• 0011
• 0100
• 0101
• 0110
• 0111
• 0000
• 1001
• 1010
• 1011
• 1100
• 1101
• 1110
• 1111

x4ñ
x4Åx1x3ñ
86
x1ñ
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0
0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
x2ñ
x3ñ
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 1 0

• 000
• 0001
• 0010
• 0011
• 0100
• 0101
• 0110
• 0111
• 0000
• 1001
• 1010
• 1011
• 1100
• 1101
• 1110
• 1111

x4ñ
x4Åx1x3ñ
87
Feynmans Notation
88
Basic Gates in Quantum Circuits
BBC95 All unitary matrices can be decomposed
into a combination of the above gates
89
Controlled U Gate
2m dimension
If all of x1,¼, xm are 1, apply U to the yñ
90
Classical Reversible Gate (1)
C1 ? Swap I1 and I2 C0 ? no change
Universal
91
Classical Reversible Gate (2)
Toffoli Gate
I
O
C1 C2 ? negate I
Universal
92
x1ñ
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0
0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
x2ñ
x3ñ
1

• 000
• 0001
• 0010
• 0011
• 0100
• 0101
• 0110
• 0111
• 1000
• 1001
• 1010
• 1011
• 1100
• 1101
• 1110
• 1111

x4ñ
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
93
Transformations from BBC95
Barenco et all, very important paper.
94
An example
a
b
c
d
e
g
g
f
(g ? abc) ? abcg
g? abc
(g ? abc)de ? f
(g ? abc)de ? f ? deg abcde ? f
Recall this example.
95
Lemma 6.1
Any 2x2 unitary matrix can be decomposed

V
V
UV2
96
Lemma 7.5
Any 2x2 unitary matrix can be decomposed
x1
x2
x3
x4
x5

x6
x7
x8
x9
U
UV2
97
Corollary 7.6 - Proof
Any nn unitary matrix can be decomposed
Lenma 7.5

Cn-1
Cn-2
Q (1)
Q (n)
(Cor. 5.3)
(Cor. 7.4)
Cn-1 Cn-1 Q (n)
98
(a)
(b)
(c)
x1ñ
x1ñ
l2
r2
r2
l2
xkñ
xkñ
x1ñ
gi
gi
gj
gj
xa ñ
0ñ
xa ñ
0ñ
i
i
xkñ
xa ñ
0ñ
xa ñ
0ñ
j
j
r3
l3
xa ñ
0ñ
xa ñ
0ñ
0ñ
xa ñ
i
gi
l1
r1
r1
l1
i1
i1
xa ñ
0ñ
gj
Gj
Gi
xa ñ
0ñ
0ñ
xa ñ
j
ik
ik
xa ñ
0ñ
0ñ
xa ñ
j1
j1
auxiliary bits
Gi
Gj
Gi
Gj
xa ñ
xa ñ
0ñ
0ñ
jk
jk
99
(No Transcript)