Title: Pr
1RD for ECAL VFE technology prototype
ECFA-DESY Workshop Amsterdam April, 2nd
Presented by Bernard Bouquet
2Specifications
General specifications
Electrical specifications
3Specifications
General specifications
Electrical specifications
4Schema Block
First ideas on block schema
Further ideas on system design
Ch.1
5Schema Block
First ideas on block schema
Further ideas on system design
6Preamplifier
50
1
OUT
1
50
7Shaper
Preamp output
Voltage to current converter
R2
C2
C1
Preamp output
R1
Standard CRRC structure
Integration time (switch on)
Standard bandpass filter optimized to minimize
noise
AMS 0.35µm BICMOS techno Does not allow us to
choose this solution (R2 100k)
Structure tested at LPC
8ADC
Structure tested at LPC
Chip should be sent to foundry in April 2003
PIPELINE ADC
10 bit ADC ?10 stages
VIN
b7
b3
b4
b5
b8
b0
b1
b2
b6
b9
Amplifier Gain2
To VIN stage N1
Vref
VIN
Gnd
Comparator
Bit N out
Vref
Stage N of pipeline ADC block schema
9Schedule