A SEMINAR ON AVR MICROCONTROLLER ATtiny2313

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A SEMINAR ON AVR MICROCONTROLLERATtiny2313

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Overview

• Features
• Peripheral Features
• Special Microcontroller Features
• AVR CPU CORE
• AVR ATtiny2313 Memories
• System clock
• Registers
• USART
• Universal Serial Interface USI

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Features

• Utilizes the AVR RISC Architecture
• AVR High-performance and Low-power RISC
  Architecture
• 120 Powerful Instructions Most Single Clock
  Cycle Execution
• 32 General Purpose Working Registers
• Fully Static Operation

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AVR Peripherals

• USART
• Serial communication with the PC
• SPI Serial Peripheral Interface
• Synchronous serial communication
• ADC
• Analog Digital Converter
• I/O Ports
• General Purpose Input Output pins (GPIO)

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Special Microcontroller Features debug WIRE
On-chip Debugging In-System Programmable via
SPI Port External and Internal Interrupt
Sources Low-power Idle, Power-down, and
Standby Modes Enhanced Power-on Reset Circuit
Internal Calibrated Oscillator
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AVR Power Management

• Low Power operation 15 mW _at_ 4 MHz
• Multiple Sleep Modes
• Sleep Modes Shutdown unused components
• Idle Mode 6 mW
• CPU OFF, all peripherals ON
• CPU woken up by interrupts
• Power Down Mode 75 mW
• CPU and most peripherals OFF
• External Interrupts, 2 Wire Interface, Watchdog
  ON
• Power Save Mode 120 mW
• Similar to Power Down
• Timer0 continues to run asynchronously

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I/O and Packages 18 Programmable I/O Lines
20-pin PDIP, 20-pin SOIC, 20-pad QFN/MLF
Operating Voltages 1.8 - 5.5V (ATtiny2313V)
2.7 - 5.5V (ATtiny2313 )Power-down Modelt 0.1
µA at 1.8V
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Pin Configuration
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AVR CPU CORE

• The main function of the CPU core is to ensure
  correct
• program execution. The CPU must therefore be able
  to
• access memories, perform calculations, control
• peripherals, and handle interrupts.

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CPU CORE

• Functions
• Application Execution
• Resource Management
• Peripheral Interaction
• RISC Architecture
• 8 bit ALU/data-path
• 128 Kb FLASH - Code
• 4 Kb SRAM - Data
• Multiple peripherals

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AVR STATUS REGISTER
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GENERAL PURPOSE REGISTERS
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System Clock

• All the clocks need not be active at a given
  time. In order to
• reduce the power consumption, the clocks can be
  halted by
• using different modes.
• CPU CLOCK
• I/O CLOCK
• FLASH CLOCK

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CLOCK SOURCES

• EXTERNAL CLOCK
• CALIBRATED INTERNAL RC OSCILLATOR 4Mhz
• CALIBRATED INTERNAL RC OSCILLATOR 8Mhz
• WATCHDOG OSCILLATOR
• CRYSTAL /CEREMIC OSCILLATOR

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INTERRUPTS

• SOFTWARE INTERRUPTS
• EXTERNAL INTERRUPTS
• External interrupt contain registers
• MCU CONTROL REGISTER
• GERERAL INTERRUPT MASK REGISTER ( GIMSK)
• EXTERNAL INTERRUPT FLAG REGISTER ( EIFR)
• PIN CHANGE MASK REGISTER (PCMSK)

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Alternate Port Functions

• Most port pins have alternate functions in
  addition to being general digital I/Os. The
  overriding signals may not be present in all port
  pins . The overriding signals are generated
  internally in the modules having the alternate
  function.
• PORT A
• PORT B
• PORT C

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8-BIT TIMER/COUNTER

• Timer/counter is a general pupose 8-bit module
  with two
• independent output compare units. It allows
  program execution
• timing.
• Two independent output compare units.
• Clear timer on compare match.
• Frequency generator
• Interrupt sources

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USART The Universal Synchronous and Asynchronous
serial Receiver and Transmitterhighly flexible
serial communication device. Full Duplex
Operation (Independent Serial Receive and
Transmit Registers) Asynchronous or Synchronous
Operation Master or Slave Clocked Synchronous
Operation High Resolution Baud Rate Generator
Odd or Even Parity Generation and Parity Check
Supported by Hardware Noise Filtering Includes
False Start Bit Detection and Digital Low Pass
Filter Three Separate Interrupts on TX
Complete, TX Data Register Empty and RX
Complete Multi-processor Communication Mode
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AVR USART vs. AVR UART Compatibility

• The USART is fully compatible with the AVR UART
  regarding
• Bit locations inside all USART Registers.
• Baud Rate Generation.
• Transmitter Operation.
• Transmit Buffer Functionality.
• Receiver Operation

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Universal Serial Interface

• The Universal Serial Interface, or USI, provides
  the basic
• hardware resources needed for serial
  communication.
• Combined with a minimum of control software, the
  USI
• allows significantly higher transfer rates and
  uses less code
• space than solutions based on software only.
  Interrupts are
• included to minimize the processor load

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THANK YOU