MIPS Procedure Calls

1
MIPS Procedure Calls

• CSE 378 Section 3

2
Basics

• Jump to procedure
• jal ltlabelgt
• Saves return address to ra
• Return from a procedure
• jr ra
• a0 - a3 to pass arguments
• v0 and v1 to return values
• Save certain registers to preserve across
  procedure calls.
• Use the stack

• t0-t9, a0-a3, v0-v1 caller-saved.
• Callers responsibility to save if expects to use
  these after a call.
• s0-s7, ra, fp callee-saved.
• Callees responsibility to save if callee uses
  them.

3
Calling procedures

• To call a procedure
• Put arguments into a0-a3
• Save caller-saved registers
• jal ltprocgt
• Restore caller-saved registers

• Example
• ltsome stuff here, uses t2gt
• set up a call to myproc(4)
• addi a0, 0, 4
• subu sp, sp, 4
• sw t2, 0(sp)
• jal myproc
• lw t2, 0(sp)
• addiu sp, sp, 4
• ltuse t2 againgt

4
Setup at the start/end of procedure

• Before any procedure starts running, it must
• Allocate memory for callee-saved registers
• Save callee-saved registers
• If calling another procedure inside, must save
  ra! (why?)
• At the end of procedure
• Place return value into v0
• Restore callee-saved regs
• jr ra

• myproc wants to use s0 inside
• subu sp, sp, 8
• sw ra, 4(sp)
• sw s0, 0(sp)
• ltdo some computation in s0gt
• addi v0, s0, 42
• lw s0, 0(sp)
• lw ra, 4(sp)
• addiu sp, sp, 8
• jr ra

5
Miscellaneous

• MIPS stack conventions
• sp double-word aligned
• Minimum frame size is 24 bytes (fits four
  arguments and return address)
• Dont really have to use it for projects
• Other rules flexible too have to use common
  sense for what you need to save and when to get
  best results.
• If gt4 arguments, use the stack to pass them
• Caller, callee must agree on where they go in the
  stack and who pops them off.

6
A bit about Intel 80x86

• Appeared in 1978, CISC, originally 16-bit,
  registers have dedicated uses, not
  general-purpose register architecture
• Extended till now as 8086 ? 80286 ? 80386 ? 80486
  ? Pentium ? Pentium Pro ? MMX ?
• 80186 not used in PCs (used for embedded systems)
• 80386 extends architecture to 32-bit, makes it
  nearly a general-purpose machine.
• Throughout history, compatibility handcuffs
  architectural advancements
• Designed to make it easy to code asm by hand

7
80x86 registers

• Only eight general-purpose registers
• EAX, EBX, ECX, EDX
• ESI, EDI
• ESP stack pointer, like sp in MIPS
• EBP base pointer, like frame pointer fp in
  MIPS
• Some special registers
• EIP instruction pointer (MIPS PC)
• EFLAGS condition codes/flags (like overflow)

8
More about registers

• The general-purpose registers are 32-bit.
• Can also access lower 16-bits with AX, BX,(i.e.
  by removing E at front). This is left over from
  16-bit days.
• Can even access lower 8 bits and next 8 bits by
  AH/AL, etc.!

9
Instructions

• Very complex, variable-length encoding
• Can take 1 byte up to 17 (!) bytes
• Examples (ATT syntax)
• mov 5, eax eax 5
• add 1, eax eax eax 1
• cmp 0, esi eflags compare esi and 0
• je label jump if they were equal

10
Addressing modes

• Source operands might be
• immediate value imm
• Register reg
• Indirect address reg, imm, reg imm
• Indexed address (!) reg reg, reg
  immreg, reg immreg imm
• Destination operands same except immediate
  values.

11
MIPS vs. Intel implement xx1(x is in memory)

• MIPS
• (assume t1 has address of x)
• lw t0, 0(t1)
• add t0, t0, 1
• sw t0, 0(t1)

Intel 8086 (assume x is at address ebp) add
1, (ebp)
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Another one xi xi1

• MIPS
• (assume t1 x, t2 i)
• sll t3, t2, 2
• add t3, t2, t1
• lw t0, 0(t3)
• add t0, t0, 1
• sw t0, 0(t3)

x86 (assume x is at address eax, i is in
ebx) add 1, (eax, ebx, 4)