Device models

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Device models

• Mohammad Sharifkhani

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A model for manual analysis
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Current-Voltage RelationsThe Deep-Submicron Era
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Velocity Saturation
Constant velocity
Constant mobility (slope µ)
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Perspective
I
D
Long-channel device
V
V
GS
DD
Short-channel device
V
V
V
- V
DSAT
DS
GS
T
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ID versus VGS
linear
quadratic
quadratic
Long Channel
Short Channel
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ID versus VDS
Long Channel
Short Channel
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Unified model
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Unified model

• Model presented is compact and suitable for hand
  analysis.
• Still have to keep in mind the main
  approximation that VDSat is constant .
• When is it going to cause largest errors?
• When E scales transistor stacks.
• But the model still works fairly well.

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Velocity saturation
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Velocity saturation
Smaller EcL ? Smaller VDsat ? Saturates quicker
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Velocity saturation
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Velocity saturation
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Velocity saturation
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Velocity Saturation
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Output resistance

• Slope in I-V characteristics caused by
• Channel length modulation
• Drain-induced barrier lowering (DIBL)
• Both effects increase the saturation current
  beyond the saturation point
• The simulations show approximately linear
  dependence of Ids on Vds in saturation.

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Output resistance
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Output resistance
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Output resistance

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Transistor stacks
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Transistor stacks (Velocity sat.)
NAND Suffers less from VS
In NAND VDsat is larger
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Velocity Saturation

• How about NAND3?
• IDSat 1/2 of inverter IDSat (instead of 1/3)
• How about PMOS networks?
• NOR2 1.8x, NOR3 2.4x, NOR4 - 3.2x
• What is ECL for PMOS?

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Alpha power law
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Alpha power law

• This is not a physical model
• Simply empirical
• Can fit (in minimum mean squares sense) to
  variety of as, VTh
• Need to find one with minimum square error
  fitted VTh
• can be different from physical
• Can also fit to a 1
• What is VTh?

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Alpha power law
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I-V Curves
Triode
Vel. Sat.
Regular sat.
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I-V curves
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A PMOS Transistor
VGS -1.0V
VGS -1.5V
VGS -2.0V
Assume all variables negative!
VGS -2.5V
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Transistor Model for Manual Analysis
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The Transistor as a Switch
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The Transistor as a Switch
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The Transistor as a Switch
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MOS capacitance

• The capacitance of the MOS affects the dynamic
  behavior of a circuit
• Speed ??Caps
• Proper modeling is needed

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MOS Capacitance
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Dynamic Behavior of MOS Transistor
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The Gate Capacitance
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Gate Cap
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Gate Capacitance
Cut-off
Resistive
Saturation
Most important regions in digital design
saturation and cut-off
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Diffusion Capacitance
Channel-stop implant
N
1
A
Side wall
Source
W
N
D
Bottom
x
Side wall
j
Channel
L
Substrate
N
S
A
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Junction Capacitance
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Capacitances in 0.25 mm CMOS process
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MOS Caps behavior