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CARUSO

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What is the influence of the Autonomic Computing principles on the real-time properties of the system? – PowerPoint PPT presentation

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Title: CARUSO


1
CARUSO an Approach Towards a Network of Low
Power Autonomic Systems on Chips for Embedded
Real-time Applications
  • Uwe Brinkschulte, Jürgen Becker
  • University of Karlsruhe, Germany
  • Theo Ungerer
  • University of Augsburg, Germany

WPDRTS 04, Santa Fe, April 2004
2
Outline of the Presentation
  • Motivation
  • CARUSO Principle Goals
  • State of the Art
  • Research Objectives
  • CARUSO System Architecture
  • CARUSO Roadmap
  • Conclusions

2
3
1. Motivation
Systems on Chip (SoC) state of the art to build
embedded computing systems with limitations in
space and power consumption
In contrast to microcontroller solutions, the
entire system is integrated on a single chip
4
1. Motivation
  • SoC can be used to build complex distributed
    embedded systems, e.g.
  • Distributed Robot Control
  • Robot Swarms
  • Complex Image Processing
  • ...
  • Designed in conventional style, these systems
    require a lot of effort for configuration,
    optimization, maintenance, ...

5
2. CARUSO Principle Goals
  • CARUSO
  • Connective Autonomic Real-time Ultra-Low-Power
    System on
  • Chip
  • is a new SoC project
  • is work-in-progress
  • is a joint venture of several research
    groups/topics
  • aims to simplify the development and operation of
    complex embedded systems.
  • integrates hardware and software for high
    performance embedded computing with respect to
    other requirements

6
2. CARUSO Principle Goals
  • Autonomic Computingself-Organization,
    self-Configuration, self-Optimization,self-Protec
    tion, self-Healinggt robust, flexible, adaptive
    embedded systems minimum human interaction
  • Connectivityto form dynamic ad-hoc networksgt
    cooperation of multiple small computing
    components self-healing, self-optimization
  • Real-timesoft-, firm- and hard real-time gt is
    a key feature for many embedded applications

7
2. CARUSO Principle Goals
  • Ultra Low Poweroptimization of overall and
    single node power consumptiongt increase battery
    life time, adapt to a changing environment (e.g.
    the distribution of available solar energy in a
    distributed network is location dependant and
    might change)
  • Cost and Spacereduction of development and
    operational costs, reduction of required spacegt
    fit the upcoming ubiquitous applications
  • Performanceuse the latest processor techniques
    (multithreading, reconfigurable hardware,
    power-aware architectures)gt get a good
    performance / power consumption trade-off

8
2. CARUSO Principle Goals
Basic idea do not treat each requirement
isolated, but try to explore (and exploit) the
relationship and interactions between
them Example Optimizing the overall energy
consumption of the distributed system including
hardware, software and middleware gt increase of
the optimization space (compared to optimizing
a single node) additional global knowledge about
task distribution, real- time constraints and
execution history can be used
9
2. CARUSO Principle Goals
  • Main project focus
  • to realize a hardware and software architecture
    for CARUSO
  • Covered research topics
  • multithreaded processor architectures
  • reconfigurable SoC
  • energy efficient hardware and software design
  • helper threads
  • real-time systems and middleware
  • autonomic computing

10
2. CARUSO Principle Goals
  • A sketch of our solutions (more details later)
  • a multithreaded processor core
  • real-time thread scheduling in hardware
  • a reconfigurable unit with reconfigurable
    multi-grain data paths
  • helper threads for local system monitoring and
    autonomic management
  • middleware for global service distribution,
    system monitoring and autonomic management
  • energy management based on real-time scheduling,
    service distribution and the local and global
    system monitoring
  • a demo application an optical tracking system

11
3. State of the Art
  • Multithreaded Processor Architectures
  • support the execution of multithreaded programs
    by special hardware
  • multiple register sets, multiple program
    counters, special pipeline design (thread tag)
  • classes of hardware multithreading
  • cycle-by-cycle interleaving
  • block interleaving
  • simultaneous multithreading
  • main purpose latency hiding
  • newly introduced to several high-end processors
    (e.g. Pentium 4), signal processors and
    microcontrollers (e.g. TriCore 2)

12
3. State of the Art
  • Multithreaded Processor Architectures
  • the Komodo project explored hardware
    multithreading for real-time applications
  • multithreaded Java microcontroller, 6 threads,
    block interleaving, 0-cycle context switch
  • real-time scheduling in hardware (FPP, EDF, LLF,
    GP)
  • GP Guaranteed Percentage Scheduling, assigns
    each thread a guaranteed percentage of the
    processor power in an interval of 100 clock
    cycles
  • offers a strict timing isolation of the threads

13
3. State of the Art
  • still unexplored combining a multithreaded
    processor core with reconfigurable hardware on a
    SoC

Multithreaded Processor Architectures
GP Scheduling
14
3. State of the Art
  • Reconfigurable SoC
  • contains a processor core and a reconfigurable
    part
  • the reconfigurable part increases the performance
    and adapts the SoC to a specific task

15
3. State of the Art
  • Reconfigurable SoC
  • classes of reconfiguration
  • static (once)
  • dynamic (during run-time)
  • fine grain (gates)
  • coarse grain (function blocks)
  • multi grain (data paths between function blocks)
  • example HoneyComb, multi grain dynamic
    reconfiguration on a SoC

16
3. State of the Art
  • to be explored the relationship between dynamic
    reconfiguration, a multithreaded processor core,
    autonomic computing and energy consumption

Reconfigurable SoC
HoneyComb Architecture start node routing
node occupied paths adaptivly routed connection
of distance i
17
3. State of the Art
  • Energy Efficient Design
  • electrical level
  • frequency and voltage scaling
  • pipeline gating
  • microarchitectural level
  • reducing external bus transfers
  • dynamic power management
  • architectural level
  • increasing the code density
  • static power management

18
3. State of the Art
  • Energy Efficient Design
  • for multithreaded processors
  • not much research done yet
  • main approach avoid energy consuming speculation
    misses
  • for real-time applications
  • exploit the time constraints to save energy
  • many approaches exploit the deadlines in EDF
  • in the Komodo project exploit the
  • worst-case/real-case gap in EDF
  • requested percentages in GP

19
3. State of the Art
  • to be explored benefits by combining known
    techniques with new approaches triggered by
    hardware reconfiguration, hardware multithreading
    and middleware

Energy Efficient Design
Energy saving in GP
20
3. State of the Art
  • Helper Threads
  • threads which are separated from the normal
    control flow
  • support system management on a multithreaded
    processor core
  • branch prediction
  • trap handling
  • cache preloading
  • real-time garbage collection
  • real-time debugging,
  • to be explored are helper threads a suitable way
    to handle self-management and self-organization
    in autonomic computing?

21
3. State of the Art
  • Real-time Middleware
  • middleware for distributed real-time and embedded
    systems is state of the art (RT-CORBA,
    MinimumCORBA, OSA, )
  • new challenges
  • reconfigurable SoC
  • a component might be realized in software or
    hardware
  • middleware has to manage, reconfigure or migrate
    such components in real-time

22
3. State of the Art
  • Real-time Middleware
  • new challenges (cont.)
  • autonomic computing
  • middleware will be a key component
  • responsible for self-x in a distributed system
  • energy saving
  • find an energy-optimal distribution for the
    current situation
  • reduce the resource needs

23
3. State of the Art
  • Autonomic Computing
  • introduced by IBM to simplify the management of
    IT systems
  • computing systems should behave like organic
    entities
  • self-x properties (self-organizing,
    self-configuring, self-healing, self-protecting,
    self-optimizing, )
  • looks like a promising idea to support tomorrows
    embedded and distributed systems (complexity,
    dependability, )
  • applying this to SoC needs further exploration

24
4. Research Objectives
  • Main CARUSO research focus
  • exploit the synergy between the different
    requirements and attributes
  • Basic research questions

25
4. Research Objectives
  • Autonomic Computing
  • Which interrelationships exist between
    self-optimization, self-protecting, self-healing
    and self-reconfiguration?
  • How can this be supported by constructing dynamic
    networks of SoCs?
  • What is the influence of the Autonomic Computing
    principles on the real-time properties of the
    system?
  • What are the advantages of the dynamic hardware
    reconfiguration feature available in the SoC for
    Autonomic Computing?
  • What is the influence of the multithreaded
    processor core?

26
4. Research Objectives
  • Energy Consumption
  • Does the overall optimization of the distributed
    system consisting of hardware, software,
    middleware and configware lead to better results
    than the optimization of the single components?
  • Can known time constraints in distributed systems
    be used as additional information source for
    resource usage and an energy-optimal
    distribution?
  • Is the possibility of software- and
    hardware-reconfiguration usable to reduce the
    energy consumption?
  • And again, what is the influence of the
    multithreaded processor core?

27
4. Research Objectives
  • Connectivity
  • What are the necessary features of the middleware
    in such a system?
  • How can middleware support energy saving and
    Autonomic Computing?
  • How the middleware is affected by the dynamic
    hardware reconfiguration feature of the
    processing nodes?
  • What kind of communication links are necessary
    for an optimal system performance?

28
4. Research Objectives
  • Real-time
  • What is the impact of hard-real-time requirement
    on the architecture of the reconfigurable SoC and
    its multithreaded processor core?
  • How the real-time behavior is affected by dynamic
    hardware reconfiguration, Autonomic Computing and
    energy saving?
  • Can the real-time constraints deliver any
    additional information to support the
    requirements mentioned above?
  • How real-time scheduling is influenced?
  • A lot of questions to be answered!

29
5. CARUSO System Architecture
Example Applications Optical Tracking System,
Robot Swarms
Global Autonomic Manager
Global Resource Manager
Global Monitoring
Authentification
API
Real-time Middleware Core
Local Autonomic Manager
Local Resource Manager
Local Monitoring
Security Manager
Communication
HW Power-Management
Reconfigurable Peripherals
Reconfigurable Coprocessor
Multithreaded Processor Core
CARUSO Node
CARUSO Node
CARUSO Node
30
5. CARUSO System Architecture
  • Autonomic Principles (self-X)
  • closed control loop
  • Monitoring Autonomic Mgmt Resource Mgmt
  • local level autonomic management on chip
  • global level distributed autonomic management
  • monitoring affects the chip, the system software,
    the middleware and the application

31
5. CARUSO System Architecture
CARUSO Chip
Dynamic Adaptive Datapaths
Multithreaded Processor Core (SMT)
Memory
EventUnit
Real-time Thread Scheduler
IntelligentDatapathCoupling
ExecutionUnits
VirtualMemoryManager
ExtensionHardwareController
EventCoupling
Standard Input/Output
Peripheral On-DemandHardware
32
5. CARUSO System Architecture
  • The integration of a multithreaded processor core
    in a
  • reconfigurable SoC is a key idea of this project
  • It enables the main project goals
  • autonomic computing supported by helper threads
    gt local and global autonomic manager gt Self-X
    properties
  • energy consumption monitored by helper threads
    gt local and global power management, load
    balancing, deactivation

33
5. CARUSO System Architecture
  • real-time constraints monitored by helper threads
    gt system reconfiguration, power management
  • real-time scheduling supported by multithreaded
    hardwaregt fast context switch, isolation, power
    aware scheduling
  • high performance/low power by hardware
    multithreading and hardware reconfigurationgt
    latencies caused by reconfiguration or other
    events are bridged by switching to another
    thread,gt avoids speculation

34
5. CARUSO System Architecture
  • Application Optical Tracking System
  • augmented reality gt tracking of camera
    position and angle
  • can be done by detection of characteristics in
    key frames
  • problems real-time, precision, energy
    efficiency

35
5. CARUSO System Architecture
  • Solution network of autonomic SoC

Selection of characteristics
Buffer
Correspondance analysis
Backward tracking
Keyframe selection
Projective reconstruction
Measure ofQualtity
Self-calibration
Video signal
Measure ofQualtity
Translation,Rotation
Calibration-matrix
36
5. CARUSO System Architecture
  • Application robot swarm
  • (e.g. cleaning the floor)
  • cooperation
  • real-time requirements
  • limited energy resources
  • highly dynamic
  • failures of single robots
  • gt autonomic behavior

37
6. CARUSO Roadmap
  • Planned project duration 3 years
  • First year
  • basic HW design (multithreaded processor core,
    reconfigurable datapaths) in SystemC
  • basic helper threads
  • basic RT middleware
  • Second year
  • hardware prototype in FPGA
  • basic local autonomic functions
  • basic global autonomic functions
  • Third year
  • hardware optimization, ASIC synthesis
  • extended local and global autonomic functions
  • sample application integration
  • evaluation

38
7. Conclusions
  • we propose a new SoC approach
  • general ideas
  • emphase connectivity, autonomic computing
    principles (self-X), real-time and low-power
  • explore and exploit the relationship between the
    different requirements
  • hardware ideas
  • combine reconfigurable hardware with a
    multithreaded processor core to support
  • autonomic management (HW reconfiguration, helper
    threads)
  • power management (power aware scheduling in HW,
    multithreading instead of speculation, latency
    bridging)
  • real-time (RT scheduling in HW, isolation)

39
7. Conclusions
  • software ideas
  • local autonomic management is done by a closed
    control loop using the helper threads
  • global, distributed autonomic management is done
    by a closed control loop using middleware
  • the middleware is responsible for
  • connectivity
  • handling the global autonomic principles (self-x)
  • global reconfiguration in HW and SW
  • optimization of the global energy consumption
  • global real-time properties
  • the work has just begun!
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