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ECSE-6230 Semiconductor Devices and Models I Lecture 8

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ECSE-6230 Semiconductor Devices and Models I Lecture 8 Prof. Shayla Sawyer Bldg. CII, Rooms 8225 Rensselaer Polytechnic Institute Troy, NY 12180-3590 – PowerPoint PPT presentation

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Title: ECSE-6230 Semiconductor Devices and Models I Lecture 8


1
ECSE-6230Semiconductor Devices and Models
ILecture 8
  • Prof. Shayla Sawyer
  • Bldg. CII, Rooms 8225
  • Rensselaer Polytechnic Institute
  • Troy, NY 12180-3590
  • Tel. (518)276-2164
  • Fax. (518)276-2990
  • e-mail sawyes_at_rpi.edu

1
sawyes_at_rpi.edu www.rpi.edu/sawyes/courses.html

December 2, 2013
2
Lecture Outline
  • PN Junctions
  • Built in Potential
  • Depletion Approximation
  • Depletion Width
  • Depletion Capacitance
  • Linearly Graded Junction

3
PN Junction Background
  • The pn junction theory serves as the foundation
    of the physics of semiconductor physics
  • The basic equations are used to develop the ideal
    static and dynamic characteristics of pn
    junctions
  • Departures from ideal
  • Generation and recombination in the depletion
    layer
  • High injection
  • Series resistance
  • Junction breakdown

4
Built-in Potential Abrupt pn junction
  • Joining the two regions of p and n type doping
    causes diffusion
  • Large carrier concentration gradient at the
    junction
  • Space charge region diffusion carriers leave
    behind uncompensated donor ions in the n region
    (Nd) and uncompensated acceptor ions in the p
    region (Na-)
  • Drift current opposes diffusion current

n
p
n
p
5
Built-In Potential Abrupt pn junction
  • Constant Fermi level throughout the sample
  • Band bending and built in potential occurs
  • Electric field is proportional to the slope of
    the bands, charge density proportional to the
    curvature

6
Built-In Potential Derivation
  • Finding potential
  • Solving for the electric field from JN equation
    and with Einsteins relationship, integrate the
    electric field to find Vbi
  • Vbi for a non degenerate semiconductor is

7
Built-In Potential Derivation
  • Built-in potential is the internal potential
    difference between the p-side and the n-side of
    the junction

8
Depletion Approximation
  • Electrostatic Solution of an abrupt, uniformly
    doped pn junction at thermal equilibrium ( J 0
    )
  • Poissons Equation
  • Depletion approximation allows Poissons equation
    to be solved easily
  • It assumes that the mobile carriers (n and p) are
    small in number compared to the donor and
    acceptor ion concentrations in the depletion
    region
  • The device is charge neutral elsewhere

9
Depletion Width, Vbi, Carrier Conc.
  • Poissons Equation
  • Integrate above For -xp lt x lt 0 (
    p-side),
  • For 0 lt x lt xn (
    n-side),
  • Maximum electric field is given by

10
Depletion Width, Vbi, Carrier Conc.
  • Integrate electric field equation to get
    potential distribution

Potential across different regions
?bi
-?n
?p
11
Depletion Width, Vbi, Carrier Conc.
  • Depletion widths are calculated to be
  • Penetration of the transition region into the n
    and p materials

12
Depletion Capacitance
  • Variation of charge within a pn junction with an
    applied voltage variation yields a capacitance
  • Capacitance in non-linear derive small signal
    capacitance associated with the depletion layer
    of a pn junction.
  • Define change of charge
  • DC signal VA has a small signal superimposed onto
    it va, W increases or decreseas by an increment
    of ?W, for small signals valtltVA, ?WltltW
  • Charge is only added and removed at the edge of
    the depletion region
  • When vagt0, W decreases (neutralizing ions)
  • When va lt 0, W increases (more depletion)

13
Depletion Capacitance
  • Two observations
  • Charges are majority carriers which respond to
    the voltage change at roughly the dielectric
    relaxation time of the material
  • At normal doping levels the majority carrier
    response time is from 10-10 to 10-12 sec.
    Therefore, the phenomena will be independent of
    the frequency of va up to very high frequencies
  • The incremental charge diagrams are similar to
    charge fluctuations in parallel plates of a
    capacitor with area A and width separation W

14
Depletion Capacitance
  • Depletion layer capacitance per unit area pn
    junction
  • Depletion layer capacitance per unit area for a
    one sided abrupt junction p n where NagtgtgtNd and
    xnoW and xpo is negligible

Parameter extraction Rearrange and solve for 1/C2
plot vs Voltage
15
Depletion Layer Widths in PN Junctions
16
Debye Length
  • Capacitance voltage data are insensitive to
    changes in doping profiles that occur in a
    distance less than a Debye Length
  • Limit of a potential change in response to an
    abrupt change in the doping profile
  • If the depletion width is smaller than the Debye
    Length, the analysis using the Poissons equation
    is no longer valid
  • Also defined as the width of the transition
    region in which the carrier depletion goes from
    100 to 0 and can written as
  • Typically, W 8LD in Si 6 LD in Ge
    10 LD in GaAs

17
Extrinsic Debye Length
18
Linearly Graded PN Junction
  • In practical devices the doping profiles are not
    abrupt
  • Near the metallurgical junction the two types
    compensate each other
  • When depletion widths terminate within this
    transition region, the doping profile can be
    approximated as a linear function

Poissons equation
a is the doping gradient in cm-4
Electric field (integrate above)
19
Linearly Graded PN Junction
  • Built in potential related to the depletion width
  • or
  • Depletion layer capacitance

20
Example
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