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Title: Lecture 2: Limiting Models of Instruction Obeying Machine


1
Lecture 2Limiting Models ofInstruction Obeying
Machine
  • ???

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2
Content
  • Machine Simulation and Equivalence
  • Unlimited-Register Machine

3
Lecture 2Limiting Models ofInstruction Obeying
Machine
  • Machine Simulation and Equivalence

??????? ?????????
4
Computer as a Partial Function
M ? a machine
? ? an M-program
? an encoding function
? a decoding function
5
Computer as a Partial Function
A partial function
6
Machine Equivalence
Output (Y)
Input (X)
7
Machine Equivalence
Output (Y)
Input (X)
8
Machine Equivalence
Output (Y)
Input (X)
9
Machine Equivalence
Output (Y)
Input (X)
10
Machine Equivalence
Output (Y)
Input (X)
11
Machine Equivalence Defined
two machines
Memory sets of M1 and M2.
M1-program
M2-program
?g, h such that
12
Machine Equivalence Defined
encoding function
f can be computed on M2 using ?, with
decoding function
?g, h such that
13
Machine Simulation Defined
A machine M2 simulates M1 if
such that
we can specify an algorithm which given any
program ? produces ? satisfying
14
Machine Simulation Defined
  1. What is the algorithm?
  2. How to find g and h?

Problems
A machine M2 simulates M1 if
such that
we can specify an algorithm which given any
program ? produces ? satisfying
15
Theorem
The memory encoder g has to be one to one.
M2 simulates M1
A machine M2 simulates M1 if
such that
we can specify an algorithm which given any
program ? produces ? satisfying
16
Theorem
The memory encoder g has to be one to one.
M2 simulates M1
Pf)
M2 simulates M1
Consider
Suppose that g is not one to one. Then, g(m1)
g(m2) M for some m1?m2.
17
Stepwise Simulation
F the set of operation functions of M1.
P the set of predicates of M1.
M2 stepwise simulates M1 if
? 1-to-1 encoding function gM1?M2 such that
1) For each F?F,
? a program ?F in M2 such that
2) For each P?P,
? a program ?P in M2 such that
and ?P doesnt change M2.
18
Stepwise Simulation
F the set of operation functions of M1.
P the set of predicates of M1.
M2 stepwise simulates M1 if
? 1-to-1 encoding function gM1?M2 such that
1) For each F?F,
? a program ?F in M2 such that
2) For each P?P,
? a program ?P in M2 such that
and ?P doesnt change M2.
19
Stepwise Simulation
F the set of operation functions of M1.
P the set of predicates of M1.
M2 stepwise simulates M1 if
? 1-to-1 encoding function gM1?M2 such that
1) For each F?F,
? a program ?F in M2 such that
2) For each P?P,
? a program ?P in M2 such that
and ?P doesnt change M2.
20
Stepwise Simulation
M2 stepwise simulates M1
M2 simulates M1
21
SR4
? 4 registers (x1, x2, x3, x4)
for i 1, 2, 3, 4.
for i 1, 2, 3, 4.
22
Review PC
Does PC Simulates SR4?
Does SR4 Simulates PC?
? 2 registers (x, y)
23
Prove PC Simulates SR4
Step 1
Step 2
For each F?FSR4, find a ?F on PC such that
To be shown
Step 3
For each P?PSR4, find a ?P on PC such that
Exercise
24
SR4
PC
25
(No Transcript)
26
Exercise
27
2 x?
28
Prove PC Simulates SR4
In fact, SR2 also simulates SR4.
Why?
29
Discussion
Is SR? more powerful than SR2?
No.
Is SR? more powerful than PC?
Not sure, now.
PC
SR4
SR?
SR2
30
Lecture 2Limiting Models ofInstruction Obeying
Machine
  • Unlimited-Register Machine

??????? ?????????
31
The Unlimited-Register Machine
  • Unlimited number of registers.
  • Unbounded capacity of every register.
  • Powerful instructions

32
The Machine R
Memory set
That is, for some, k ? 1, ni 0 for all i ?
k (finite memory are used).
33
Input Output Registers of R
k input registers
l output registers
Other registers can be working registers if
necessary.
34
Running R
? a program in R
e encoder
d decoder
35
SR?
? The same as R
Operations Predicates
i 1, 2,
36
Machine Simulations
Of course.
SR?
R
Not sure, now.
37
Prove SR? Simulates R
Step 1
w working registers
Step 2
Step 3
38
Prove SR? Simulates R
Step 1
w working registers
Converted to register-mode operation by using a
working register.
Step 2
Step 3
39
Prove SR? Simulates R
? ? ? ?
gt
40
Prove SR? Simulates R
41
Prove SR? Simulates R
42
Prove SR? Simulates R
43
Prove SR? Simulates R
44
Exercise
Using SR? to Simulate R, at least how many
working registers are required?
45
Discussion
R
46
Discussion
  • Machine equivalence is reflexive, symmetric, and
    transitive, i.e., an equivalence relation.
  • SR2 is the same powerful as R.
  • To study computation, considering PC, SR2, SR4,
    SR or R is equally well.
  • The above machines are register machines.

47
Register Functions
Use x1, , xk as input registers of R.
Let fi Nk ? N be the function computed by an
R-program ? using xi as the output register.
We call the k functions f1, , fk the (k-adic)
register functions of ?.
We will considered register functions (the class
of all k-adic, k?1, register functions) to be
functions that are computable by R.
48
Examples
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