Network Enabled Wearable Sensors

1
Network Enabled Wearable Sensors
Senior Design Project May 4-28 Clients CRCD
Group ECpE, Iowa State University
Abstract
Project Requirements

• Design Objectives
• Expandable hardware platform
• Simple sensor connection
• Flexible communications protocol
• Functional Requirements
• User must be able to develop, simulate, and
  troubleshoot a hardware design
• User must be able to compile, upload, and test
  hardware and software designs
• FPGA must be capable of interfacing with selected
  sensor and communications hardware
• FPGA will process the interaction between the
  sensors and data supplied from an external host
• Design Constraints
• Number of I/O pins available on FPGA
• FPGA speed grade
• FPGA logic capacity
• Available FPGA interface types
• Measurable Milestones
• Project definition

The Combined Research Curriculum Development
(CRCD) project works with the Virtual Reality
Applications Center (VRAC) project devising
methods of integrating human interface devices
with the C6 virtual reality environment. The
CRCD project would like to expand upon the
current C6 user interfaces. The goal of this
project is to develop a field programmable gate
array (FPGA) prototype platform capable of
receiving and processing data from various
sensors, as well as communicating this data to an
external device. An FPGA platform and an
appropriate design environment shall be selected.
The team shall interface various sensors to the
FPGA as a prototype for future human interfaces
to the C6. As a final demonstration of the
sensor functionality, a low-latency control
system will be implemented. Sensor information
will be processed in real-time to activate some
tactile feedback device. Application notes will
be developed concurrently with this project,
providing potential laboratory material for
classes in the ECpE department.
Introduction
Acknowledgements We would like to thank the CRCD
group for funding this project. Problem
Statement As the complexity of the applications
developed by the VRAC for the C6 increases, there
is a pressing need to develop a more robust
platform for adding human interface devices to
the system. Currently, only one user is allowed
to directly interact with the virtual
environment, and the interaction allowed is
limited. The VRAC would like to develop a more
sophisticated interaction system. This enhanced
system will allow more sensor data per user, as
well as allow multiple users to interact with the
environment. This project will develop a wearable
computing prototype as a platform for the VRAC to
develop the enhanced interaction system.
Figure 2 Current C6 HID
Technical Approach

• The technical approach to this project will
  involve a thorough analysis of the hardware
  required for the prototype, as well as a survey
  of the CRCD projects desired hardware. FPGA
  hardware and modules must be analyzed and chosen
  based on future goals, as the final product is
  intended to be elaborated by the CRCD.
• Technologies Considered
• Standard FPGA
• Platform-based FPGA
• Wireless communications module
• Wired communications module
• Testing Considerations
• Sensor testing
• Communications module testing
• Data processing latency testing
• Virtual environment testing

Project Specifications

• Prototype Functions
• Connectivity to a variety of sensors
• Communication with an external host
• A low latency control system to process
  environment data from the external host
• Operating Environment
• The final product will be a prototype to be used
  in a laboratory setting meeting the following
  conditions
• Indoors
• Clean, dust free environment
• Room temperature
• x86 compatible PC running Windows 2000 or better
  for FPGA development
• Intended Users
• CRCD project members experienced with FPGA design
• Trained VRAC personnel
• Portions of the project may be developed into
  application notes for CprE students
• Intended Uses
• Research and development for C6 human interface
  devices

Figure 3 Proposed solution flowchart
Resources and Schedule
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  Aug Aug Aug Aug Sep Sep Sep Sep Oct Oct Oct Oct Nov Nov Nov Nov Dec Dec Dec Dec Jan Jan Jan Jan Feb Feb Feb Feb Mar Mar Mar Mar Apr Apr Apr Apr May May May May
                                                                                 
Documentation                                                                                
                                                                                 
                                                                                 
FPGA                                                                                
                                                                                 
                                                                                 
Sensor Development                                                                                
                                                                                 
                                                                                 
Communication Development                                                                                
                                                                                 
                                                                                 
Virtual Test Environment                                                                                
                                                                                 
                                                                                 
Demonstration                                                                                
                                                                                 
Figure 1 Virtex II Pro FPGA Board
Team Information
Team Members Casey Averill CprE
caverill_at_iastate.edu Bradley Deem CprE
bcre8ive_at_iastate.edu Grant Dickinson CprE
grantd_at_scl.ameslab.gov Jonathan Lucas CprE
jalucas_at_iastate.edu Project Website
http//seniord.ee.iastate.edu/may0428/
Faculty Advisors Morris Chang
morris_at_iastate.edu Diane Rover
drover_at_iastate.edu Akhilesh Tyagi
tyagi_at_iastate.edu