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Jianhui Gu

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(counting house) DAQ. FED. NIM. DQM. TRG. FED crate (DDU DCC) DDU. DCC. Gigabit. Ethernet ... DDU header/trailer: Data checking information. EMU DAQ. GU. Status ... – PowerPoint PPT presentation

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Title: Jianhui Gu


1
EMU DAQ
  • Jianhui Gu
  • The Ohio State University

2
CMS EMU Slice Test
ME2
  • West end, 60 sector
  • 36(39) chambers
  • provided electronics available
  • otherwise 24 CSCs
  • Sector 5, overlap with DT sectors 1011

60o
3
What EMU Measure
  • 6-layer chambers
  • Radial, trapezoidal cathode strips
  • Azimuthal anode wires
  • Induced charges on strips - precise f coordinate
  • Closely spaced wires - fast timing
  • Wires ganged in groups of 5 -16 for r coordinate

4
CSC Signal Processing
SCA
cathode
ADC
PA
OUT
SH
MUX C/L
DAQMB
write
read
Calibration
Controller
LCT, L1, cal,clock
Comparator network
CFEB
MUX
TMB
Anode
ALCT
SH
PA
DISC
Threshold
AFEB
5
When to take data
Each L1A as one event, Data if L1A and LCT
match. CFEB Eight time samples (50ns per
sample) The two samples before peak are for
pedestal (dynamic) Calibration for gain and
linearity
6
Cathode Calibration
BUCKEYE (Amplifier ASIC) has internal shift
register which controls calibration
JTAG Shift Register Modes Normal Precision Ext.
Cap (lt1) Int. Cap Small (1x) Int. Cap Medium
(2x) Kill
Buckeye Calibration pulser 12 bit DAC
(1.2 mV pulse steps) readback 1216
bit ADC time delay 7 nsec steps The
calibration constant will be saved in a central
area, and applied on offline analysis
7
Data Flow
DAQMB
Data Asynchronous 100 KHz L1A
CFEB
Control
CFEB
FIFO
DDU
DCC
SLINK
CCB
Local DAQ PC FARM
TMB
Muon tracker CMS trigger CMS control
ALCT
8
EMU Electronics
Myrinet
Controller DMB CCB MPC TMB
SLINK64
Gb/s Fibers
DDU DCC
CMS DAQ
FRL
FED
Peripheral C
CFEB
ALCT
TRG
AFEB
LV
HV
TF
TTC
Detector
36 (39,24) CSC as inputs
1 SLINK64 as outputs (gt400MB/s)
9
Real Electronics
TTC
Peripheral Crate
Track Finder
10
Real Electronics
DCC
DDU
NIM
DAQ
FRL crate (counting house)
SLINK
DQM
TRG
FED
Gigabit Ethernet
FED crate (DDU DCC)
Myrinet switch (counting house)
11
Data Concentration
CSC
DAQMB
DDU
15
CMS DAQ
DCC
5
DAQMB
CSC

SLINK64
DDU
Local Spy DAQ
Gigabit Ethernet
12
Data Format
DCC Headers http//www.physics.ohio-state.edu/
cms/dcc DDU Headers http// www.physics.ohio-st
ate.edu/cms/ddu DAQMB Headers
http//www.physics.ohio-state.edu/cms/dmb ALCT
(AFEB) data, if any TMB (CLCT) data, if any CFEBs
data, if any http//www.physics.ohio-state.edu/cm
s/cfeb DAQMB Trailers DDU Trailers DCC
Trailers CRC is used for data checking. CFEB
CRC, ALCT CRC, TMB CRC, DMB CRC, DDU CRC and DCC
CRC (Slink CRC) DDU header/trailer Data checking
information
13
Status
Right now, six chambers are used (20o ME2,
ME3) Production electronics is (will be) used
for the test
System working Run1007 results CSC5
ME2/2/31 CSC9 ME3/2/31
14
Status
EMU slice test workshop next week at
CERN Implement more chambers, and electronics,
and software Data format almost final
15
Spare Slides
16
On-Chamber Electronics
17
DAQMB Data Flow
Data Funneled through 16Kx18bit FIFOS
On receiving L1A CFEBs, TMB and ALCT send
data_available to DAQMB synchronously (relative
to L1A) But data are packed with Headers and
Trailers, sent to DDU asynchronously on every L1A
TLK2501
Clock Osc.
18
DDU Data Flow
  • FMM Slow Control
  • BUSY
  • READY
  • L1 Throttle
  • Data Errors
  • Loss of Synch

VME
Slow-control and JTAG
MGT-HSC
DCC/DAQ
Fiber links from 15 DMBs
Multi-Gigabit Transmission via High-Speed
Connector to backplane
TTC control from DCC via backplane
S-Link
(for SP use)
Gigabit Ethernet To Local DAQ
Transceivers
19
DCC Data Flow
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