EECEC 320 Introduction To Microprocessors Class 11107

1
EE/CEC 320 Introduction To Microprocessors
Class 1/11/07

• Professor Gary Gear
• Software Design

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Software Design

• All programming requires planning
• For a few of you sometimes the problem is so
  simple that you can plan in your head. This will
  not be allowed in 320 or 322!
• You must design your software solution
• You must express your design in a way that both
  you and I can understand it.
• All of our microprocessor labs (322) require
  programming, therefore all of the labs require
  software design and expression
• All of the 320 software assignments will require
  that you submit your design along with the
  program.
• All of your 322 labs will require that you do
  your software design before lab and have the
  design expression available for my review at the
  start of each lab.
• If you do not have a design, you will be asked to
  leave the lab and go do the design first!

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Design Expression

• Software design expression can take many forms
  it is up to you to use the forms that express
  your design most clearly
• We will rely principally on three forms of design
  expression
• Block Diagrams
• State Diagrams sometimes called State Transition
  Diagrams
• Flow Charts
• Most software designs will require the use of
  some combination of all three

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Block Diagrams

• Block Diagrams show the Big Picture
• What are the major components of your design
• What is the hierarchy and how do they
  interconnect
• As the semester progresses, some of the reusable
  C functions can simply be expressed as a block

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VHDL Program Design

• Entity
• Pin Names and In/Out declarations
• Pin number assignments
• Architecture
• Variable declarations
• Combinatorial Logic
• State or synchronous logic
• State Transition Diagram
• Since VHDL does not flow like a computer
  program, Flow Charts are generally not useful

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VHDL Block Diagram

• Insert block diagram here

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VHDL State Transition Diagram
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C Block Diagram
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C Flow Charts
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Organize your Work

• Keep each program or Lab in its own folder
• This seems obvious but most people do not do this
• This will cause endless grief with your VHDL work
  so DO IT!!!
• Keep a notebook bring it to every lab
• Each lab should have its own section
• When you create libraries, each library should
  have its own section
• This is the only way you will be able to reuse
  your work through the semester