Week 16

1
Week 16
2
Administration

• Week 17 (1/7) Term Project workshop
• No class, I will be here to help you work on your
  term project
• Deadline for the lab exercises
• Demo and turn on your codes before 2008/1/7 2359
• Otherwise I dont think you can finish your term
  project

3
MSP430 Clock System
high-frequency oscillator (optional)
MSP430
digitally controlled oscillator
Clock Signals
Clock Modules
CPU
DCOCLK
MCLK Master Clock
XT2CLK
SMCLK Sub-main clock
Peripherals Timer, UART,
LFXT1CLK
ACLK Auxiliary clock
32.768KHz fixed rate
Low-frequency/high-frequency oscillator
4
MSP430 Power Consumption Characteristics

• Current increase with clock frequency
• Current increase with supply voltage
• Supply voltage vs frequency
• More active peripherals means more current
  consumption

5
Operating Modes

• MSP430 has six operating modes
• The operating modes take into account three
  different needs
• Ultralow-power
• Speed and data throughput
• Minimization of individual peripheral current
  consumption
• Turn off different clocks in different operating
  mode

6
Operating Modes
7
Typical Current Consumption
8
Low Power Modes

• Different low power mode disable different clocks
• Peripherals operating with any disabled clock are
  disabled until the clock becomes active
• Wake up is possible through all enabled
  interrupts
• Returns to the previous operating mode if the
  status register value is not altered during the
  ISR

9
Code Flow
10
Enter/Leave LPM
Intrinsic function
11
Which LPM To Enter?

• Depends on your configuration
• MSP430 has a flexible clock system
• Clock signal can select different clock source
• Peripheral can be configure to use different
  clock signal
• Which clock signal still require when system goes
  to sleep
• Remember the peripherals that use the clock
  signal will also be disabled

12
Cautions

• Wakeup latency
• Clock module require some time to get stable
• DCO less than 6 µS
• Low frequency oscillator (32.768KHz) hundreds of
  milliseconds
• Temperature drift
• DCO change with temperature
• If temperature is possible to changes
  significantly, re-calibrate DCO when leaving low
  power mode
• If DCO varying too large, some peripherals might
  not function correctly, ex. UART

13
Typical Configuration
MSP430
digitally controlled oscillator
Clock Signals
Clock Modules
CPU
DCOCLK
MCLK Master Clock
XT2CLK
SMCLK Sub-main clock
Peripherals Timer, UART,
LFXT1CLK
ACLK Auxiliary clock
32.768KHz fixed rate
14
Useful Mode

• LPM0
• CPU, MCLK off
• DCO, SMCLK, ACLK on
• Power consumption 60 µA (Taroko)
• SMCLK still required
• Ex. UART use SMCLK
• LPM3
• CPU, MCLK, DCO, SMCLK off
• ACLK on
• Power consumption 7 µA (Taroko)
• Only ACLK required
• Timer use ACLK (time keeping)

15
TinyOS Power Management

• Enter low power state when the task queue is
  empty
• TinyOS 1.x takes two approach
• Mica platform
• Calculates the low power state when told to
• Problem when to calculates?
• MSP430 platform
• Calculates the low power state when every time
  the scheduler tells the system to go to sleep
• Problem overhead

16
TinyOS Power Management

• TinyOS 2.x three basic mechanisms
• Dirty bit
• When hardware configuration that might change the
  possible low power state of the microcontroller
• Must re-compute the low power state
• Low power state calculation function
• Calculating the lowest power state that it can
  safely put the microcontroller into without
  disrupting the operation of TinyOS subsystems
• Power state override function
• higher-level components can overrides the low
  power state

17
Calculating The Lowest Power State
Check registers to know which clock sources the
system used in order to determine which LPM mode
to enter
18
Potential Problems

• Requirements that cannot be captured in hardware
  status and configuration registers
• Ex. Maximum tolerable wakeup latency
• Power override can only set to higher LPM mode
• Lack of optimization

19
Principles for Low-Power Applications

• Maximize the time in LPM3
• Use interrupts to wake the processor and control
  program flow
• Peripherals should be switched on only when
  needed
• Use low-power integrated peripheral modules in
  place of software driven functions
• For example Timer PWM, DMA

20
Measurement

• How to measure power consumption
• Measure current with a high-end digital
  multimeter
• Measure voltage with oscilloscope
• Characteristics of power consumption
• Large dynamic range
• Minimum (LPM3) 10 µA
• Maximum (RadioLEDADC) 100 mA
• Require high resolution
• Fast switching
• Current consumption change very fast
• Require fast sample rate

21
Measurement

• Measure current with a high-end digital
  multimeter
• Agilent 34411A digital multimeter
• 6 ½ digit
• 50000 SPS (max)

22
Measurement

• Measure voltage with oscilloscope

I
Oscilloscope measure voltage
Rsense
I V/Rsense
23
Demo
24
Watchdog Timer

• A dog watch for system hang
• Watchdog timer on MSP430
• 16-bit timer, four software-selectable time
  intervals
• (clock source)/32768, (clock source)/8192, (clock
  source)/512, (clock source)/64
• Resets the processor when it rolls over to zero
• Can be configured into watchdog mode or interval
  mode
• Watchdog mode generate a reset when timer
  expired
• Interval mode generate a interrupt when timer
  expired
• When power up, it is automatically configured in
  the watchdog mode
• Initial 32-ms reset interval using the DCOCLK.
• Must halt or setup the timer at the beginning

25
Usage

• Stop watchdog timer
• WDTCTL WDTPW WDTHOLD
• Change watchdog timer interval
• WDTCTL WDTPWWDTCNTCL(interval)
• Periodically clear an active watchdog
• WDTCTL WDTPWWDTCNTCL

ClockSource/32768 ClockSource/8192
WDTIS0 ClockSource/512 WDTIS1 ClockSource/64
WDTIS0 WDTIS1
Password-protected must include the write
password
26
Supply Voltage Supervisor

• Monitor the AVCC supply voltage or an external
  voltage
• Can be configured to set a flag or generate a
  reset when the supply voltage or external voltage
  drops below a user-selected threshold
• Comparison
• 14 threshold levels for AVCC
• SVSIN is compared to an internal level of
  approximately 1.2 V

27
SVS Register

• SVSCTL
• VLDx

28
Direct Memory Access

• Transfers data from one address to another,
  without CPU intervention
• Increase throughput and decrease power
  consumption
• DMA on MSP430
• Three independent transfer channels
• Configurable transfer trigger selections
• Timer, UART, SPI, ADC, ..
• Byte or word and mixed byte/word transfer
  capability
• Single, block, or burst-block transfer modes
• Block sizes up to 65535 bytes or words

29
DMA Addressing Modes
Source/destination address can be configured to
be unchange/increment/decrement after each
transfer
30
DMA Transfer Modes

• Six transfer modes
• Single transfer, block transfer, burst-block
  transfer, repeated single transfer, repeated
  block transfer, repeated burst-block transfer
• Single transfer
• Each transfer requires a separate trigger, DMA is
  disable after transfer
• Must re-enable DMA before receive another trigger
• Repeated single transfer DMA remains enable
• Another trigger start another transfer
• Block transfer
• Transfer of a complete block after one trigger,
  DMA is disable after transfer
• Repeated block transfer DMA remains enable,
• Another trigger start another transfer
• Burst-block transfer
• Block transfers with CPU activity interleaved,
• Repeated burst-block transfer DMA remains enable
• Keep transferring
• CPU executes at 20 capacity

31
Initialization And Usage

• Example

(DMACTL0) Configure transfer trigger
(DMA0SA) Configure source address
(DMA0DA) Configure destination address
(DMACTL1) Select transfer mode, addressing mode,
and/or other setting, and enable DMA
(DMA0SZ) Configure block size
Use DMA to transfer a string to UART buffer, send
it out through UART
32
Others About DMA

• DMA Transfer Cycle Time
• DMA transfers are not interruptible by system
  interrupts

33
Flash Memory Controller

• MSP430 flash memory is bit-, byte-, and
  word-addressable and programmable
• Segment erase and mass erase
• Minimum VCC voltage during a flash write or erase
  operation is 2.7 V
• Program code are stored in the flash
• Unused flash memory can be use to store other data

34
Flash Memory Characteristics

• Write in bit-, byte-, or word erase in segment
• MSP430F1611 segment size
• Information memory 128 bytes
• Main memory 512 bytes
• Erase
• Make every bit in the segment as logic 1
• Write
• Generate logic 0 in the memory
• Flash endurance
• Maximum erase/write cycles
• In MSP430 datasheet
• Minimum 10000 cycles
• Typical 100000 cycles

35
Flash Memory Operation

• Read, write, erase mode
• Default mode is read mode
• Write/erase modes are selected with the BLKWRT,
  WRT, MERAS, and ERASE bits
• Flash Memory Timing Generator
• Sourced from ACLK, SMCLK, or MCLK
• Must be in the range from 257 kHz to 476 kHz
• Incorrect frequency may result in unpredictable
  write/erase operation

36
Flash Memory Erase

• Example

(FCTL2) Setup timing generator
(FCTL3) Unlock flash memory
(FCTL1) Configure the operation
Disable all interrupts and watchdog
(FCTL3) lock flash memory
Re-enable interrupt and watchdog
Wait until erase complete
Dummy write
Password protected
37
Flash Memory Write

• Example

(FCTL2) Setup timing generator
(FCTL3) Unlock flash memory
(FCTL1) Configure the operation
Disable all interrupts and watchdog
(FCTL3) lock flash memory
Re-enable interrupt and watchdog
Wait until write complete
Write to specific memory address
Password protected
38
MSP430 Application Notes

• Sample applications on using an MSP430
• Some useful examples
• MSP430 Software Coding Techniques
• Random Number Generation Using the MSP430
• CRC Implementation with MSP430
• Digital FIR Filter Design Using the MSP430F16x
• Wave Digital Filtering Using the MSP430

39
MSP430 Software Coding Techniques

• Using these methods can greatly reduce debug time
  and/or provide additional robustness in the field
• Some should be used in every program, while some
  are situation dependent

40
Techniques

• First Things First Configure the Watchdog and
  Oscillator
• Configuring the watchdog should be among the
  first actions taken by any MSP430 program
• Using a low-frequency crystal on LFXT1 with a
  device from the 4xx or 2xx families, the code
  should configure the internal load capacitance
  (not for MSP430F1611)

41
Techniques

• Always Use Standard Definitions From TI Header
  Files
• This is what we do
• Using Intrinsic Functions to Handle Low Power
  Modes and Other Functions

Intrinsic function
42
Techniques

• Write Handlers for Oscillator Faults
• In MSP430F1611, you can only delay for some time
  to ensure the low frequency oscillator to stable
• The other MSP430 family has specific circuit to
  detect
• Increasing the MCLK Frequency
• Make sure you have enough voltage level to
  operate at the frequency you set
• Or unpredictable behavior
  can occur

43
Techniques

• Using a low-level initialization function
• Problem
• By default, when a C compiler generates assembly
  code, it creates code that initializes all
  declared memory and inserts it before the first
  instruction of the main() function
• In the event that the amount of declared memory
  is large
• The time required to initialize the long list of
  variables may be so long that the watchdog
  expires before the first line of main() can be
  executed
• Solution
• Disables the initialization of memory elements
  that don't need pre-initialization
• __no_init int x_array2500
• Use a compiler-defined low-level initialization
  function

44
Techniques

• In-System Programming (ISP)
• If using the MSP430 ISP functionality to write to
  flash memory
• Set the correct timing value (257 kHz to 476
  kHz)
• Set the flash lock bit after the ISP operation is
  complete
• Take care that the cumulative programming time
• Provide sufficient VCC
• Using Checksums to Verify Flash Integrity
• Flash memory data may corrupt, use checksum to
  verify flash integrity periodically