A New Transitive Closure Algorithm with Application to Redundancy Identification

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A New Transitive Closure Algorithm with Application to Redundancy Identification

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Gaur, et al.: DELTA'02. 1 ... Gaur, et al.: DELTA'02. 2. Talk Outline. Problem ... Matrix method (see, Gaur, MS Thesis, Rutgers U., 2002). Examine all nodes: ... –

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Title: A New Transitive Closure Algorithm with Application to Redundancy Identification


1
A New Transitive Closure Algorithm with
Application to Redundancy Identification
  • Vivek Gaur
  • Avant! Corp., Fremont, CA 94538, USA
  • vgaur_at_avanticorp.com
  • Vishwani D. Agrawal
  • Agere Systems, Murray Hill, NJ 07974, USA
  • va_at_agere.com
  • http//cm.bell-labs.com/cm/cs/who/va
  • Michael L. Bushnell
  • Rutgers University, Dept. of ECE, Piscataway, NJ
    08854, USA
  • bushnell_at_caip.rutgers.edu

2
Talk Outline
  • Problem Statement
  • Background Redundancy Identification
  • Implication graph
  • Partial implications
  • Transitive closure
  • Redundancy identification
  • Results
  • Conclusion

3
Problem Statement
  • Many problems can be solved by implication graphs
    and transitive closure.
  • We will study the problem of redundancy
    identification.
  • Redundancy identification has applications in
    testing and in circuit optimization.

4
Redundancy Identification
  • ATPG based method
  • Exhaustive test pattern generation to find
    whether or not a target fault has a test.
  • All redundant faults can be found, but ATPG cost
    is exponential in circuit size.
  • Fault independent method
  • Method analyzes circuit topology and function
    locally no specific fault targeted.
  • Many (not all) redundant faults can be found at a
    lower cost.
  • FIRE, Iyer and Abramovici, VLSI Design94.
  • TC, Agrawal, Bushnell and Qing, ATS96.

5
Use of Implication Graphs
  • Implication graphs
  • Chakradhar, et al., Book90
  • Larrabee, IEEE-TCAD92
  • Transitive closure
  • ATPG Chakradhar, et al., IEEE-TCAD93
  • Redundancy, Agrawal, et al., ATS96
  • Partial implications
  • Henftling, et al., EDAC95
  • Gaur, MS Thesis02, Rutgers University

6
Implication graph
An implication graph is a representation of
logical implications between pairs of signals of
a digital circuit.
  • Nodes
  • Two nodes per signal nodes a and a correspond to
    signal a.
  • A node has two states (true,false) represents
    the signal state.
  • Edges
  • A directed edge from node a to b means a1
    implies b1.

7
Building an Implication Graph
A B
B
C
A
C
AB C 0
A
B
C
AC BC ABC 0
  • If C is 1 then that implies that A and B must
    be 1, but the reverse is not true. Similarly,
    if either A or B is 0 then C will be 0. But
    if we want to represent the implications of A and
    B on C then partial implications are necessary.

8
Partial Implications
A B
B
C
A
C
AB C 0
A
B
C
AC BC ABC 0

Reference Henftling, et al., EDAC, 1995
9
Observability Variables
  • Observability variable of a signal represents
    whether or not that signal is observable at a PO.
    It can be true or false.

OA
OC 1
OC
A B
OA
C
B
(PO)
OB
OCB OA 0
OCOA BOA OCBOA 0
10
Adding Observability Variables to Implication
Graph
OC

OA
OCOA BOA OCBOA 0
B
OA
OC
B
C
A
OC
OA
A
B
C
OB can be added similarly.
11
Transitive Closure
  • Transitive closure of a directed graph contains
    the same set of nodes as the original graph.
  • If there is a directed path from node a to b,
    then the transitive closure contains an edge from
    a to b.

a
b
a
b
c
c
d
d
Transitive closure
A graph
12
Stuck-at Fault Redundancy
  • Detection of a fault requires the fault to be
    activated and its effect observed at a PO.
  • Example Fault a s-a-1 is detectable, iff
    following conditions can be simultaneously
    satisfied
  • a 0
  • Oa 1

13
Redundancy Identification by Transitive Closure
c
a
s-a-0
b
c
a
d
e
s-a-0
b
d
Circuit with two redundant faults not found by
FIRE or TC
Od
Oc
Implication graph (some nodes and edges not shown)
Implication Partial implication Transitive
closure edge
14
Method Summarized
  • Obtain an implication graph from the circuit
    topology and compute transitive closure
  • Path-tracing algorithm (see this paper).
  • Matrix method (see, Gaur, MS Thesis, Rutgers U.,
    2002).
  • Examine all nodes
  • S-a-0 is redundant if the signal implies its
    complement.
  • S-a-1 is redundant if the complement of the
    signal implies the signal.
  • Both faults are redundant if the signal and its
    complement imply each other.
  • S-a-0 is redundant if the signal implies its
    false observability variable.
  • S-a-1 is redundant if the complement of the
    signal implies its false observability variable.
  • S-a-0 is redundant if the observability variable
    implies the complement of the signal.
  • S-a-1 is redundant if the observability variable
    implies the signal.
  • Both faults are redundant if the observability
    variable and its complement imply each other.

15
Classification of Redundant Faults by TCAND
HITEC, Nierman and Patel, EDAC91
16
FIRE and Transitive Clo.
Iyer and Abramovici, VLSI Design94
17
Complexity of TCAND
SUN Sparc 5
18
Limitation of Method
  • Observability variable of a fanout stem is not
    analyzed.
  • Only the redundant faults due to false
    controllability of fanout stem can be identified.

s-a-1
s-a-0
Three redundant s-a-0 faults identified
by transitive closure
Two redundant stem faults not identified by
transitive closure
19
Conclusion
  • Partial implications improve redundancy
    identification.
  • Present limitation of the method is the
    identification of redundancy due to the false
    observability of fanout stem open problem.
  • Transitive closure computation run times were
    linear in the number of nodes for the implication
    graphs of benchmark circuits, although the known
    worst-case complexity is O(N3) for N nodes.
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