Gigabit Ethernet Design ECE 4006C

1
Gigabit Ethernet DesignECE 4006C Spring 2003

• Group 7
• Presentation 10
• Courtenay Smith
• April 17th, 2003

2
Progress Report

• Sensitivity problem solved
• Eye diagram comparisons
• Attenuation testing complete
• Tx at 5dB, and 10dB.
• Loopback (TxRx) at 5dB, 10dB, and 15dB
• Alignment tolerance test completed.
• Eye diagrams and Plot
• Run 2 layout completed and shipped.
• Begun work on final paper.

3
VCSEL Power Test Setup
4
Sensitivity Problem Corrected

• We were not driving the VCSEL hard enough.

5
Signal Comparisons
Tx PRBS7 - Old
Loopback PRBS7 - Old
Tx PRBS7 - New
Loopback PRBS7 - New
6
Tx Attenuation at 5dB
D21.5 at 5dB
K28.5 at 5dB
K28.7 at 5dB
PRBS7 at 5dB
7
Tx Attenuation at 10dB
D21.5 at 10dB
K28.5 at 10dB
K28.7 at 10dB
PRBS7 at 10dB
8
Loopback Attenuation at 5dB
D21.5 at 5dB
K28.5 at 5dB
K28.7 at 5dB
PRBS7 at 5dB
9
Loopback Attenuation at 10dB
D21.5 at 5dB
K28.5 at 5dB
D21.5 at 10dB
K28.7 at 10dB
10
Loopback Attenuation at 15dB
D21.5 at 15dB
K28.7 at 15dB
11
Alignment Tolerance Setup
12
Unconnectorized PD Eyes
D21.5
K28.5
K28.7
PRBS7
13
Alignment Tolerance Results
14
Alignment Tolerance Results
Diameter of bottom circle ? 45 ?m
Height of cone ? 76.7 ?m
15
Run 2 Layout
16
Gantt Chart
Scheduled Progress
On Schedule Progress
Event
17
Game Plan

• Assemble and Test Run 2 PCB.
• Full throttle on FINAL PAPER.

18
Dan Quayle Quote of the Day..

• This president is going to lead us out of this
  recovery. It will happen.