V

1
Silicon sensors status

• Václav Vrba
• Institute of Physics, AS CR, Prague

2
Pad array design consideration

• Along with the diodes, the technique used for
  fabrication of bias resistors and coupling
  capacitors represents an important issue
• a) polysilicon resistors production of the tile
  needs about 7-8 masks can be the source of
  additional yield reduction.
• b) punch through resistors production of the
  tile needs about 5 masks easy to produce needs
  to check whether required parameters can be
  achieved.
• c) ion implantation resistors not considered
  here.

3
Design consideration Polysilicon resistors
Bias lines
Top view
Direct contact on diode e.g. for testing
Bias resistor
Coupling capacitor
Vertical cross section
4
Design consideration Polysilicon resistors
5
Design consideration Punch through resistors
Bias lines
Top view
Direct contact on diode e.g. for testing
Bias resistor
Coupling capacitor
Vertical cross section
6
Design consideration a partial summary

• a) polysilicon resistors
• should not be a problem to have resistors ? 10
  M?
• capacitors ? 1-10 nF.
• b) punch through resistors
• resistors to be tested if acceptable then it is
  a simple solution
• capacitors as a).
• Compatibility of process for variants a) and b)
  on one wafer? Option a) as a baseline for main
  sensor tile?

7
Pre-prototyping
8
Tests outlines

• A) Diode tests
• a) I-V curves
• Vbreak-down ? Vop
• Ileak _at_ Vop lt cca 30 nA/cm2
• b) C-V curves
• determination of Vfull-depletion Vop
  Vfull-depletion 50 V.
• c) Long term stability tests
• Ileak _at_ Vop .
• Tile should be rejected if
• Vbreak-down lt Vop
• Ileak gt I crit (to be defined).

9
Electric characterization
10
Tests outlines

• B) Bias resistors
• a) shorts
• b) breaks
• c) outside specifications
• C) Capacitance couplings
• a) shorts
• b) breaks
• c) outside specifications

11
Tests outlines

• Basic equipment
• micromanipulators with contact needles
• I-V Keithley 487 A
• C-V LCR meter HP

12
Probestation