Concurrency and Software Transactional Memories

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Concurrency and Software Transactional Memories

• Satnam Singh, Microsoft

Faculty Summit 2005
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Concurrency and Parallelism

• Software engineering.
• Multi-core.
• Future computing architectures.
• Reconfigurable computing.
• Message passing multi-processor systems.
• Alternative computing devices.

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Concurrent Programming

• Threads C, Java, C
• Rendezvous Ada.
• Synchronous Esterel, Lustre.
• Join patterns Jocaml, C-Omega.
• Implicit parallelism functional languages.
• Hardware VHDL, Verilog.

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Reconfigurable Systems
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Code/Circuit Generation
VHDL, Verilog -gt hardware implementation
void uart_device_driver () .....
Esterel design
uart.c
C -gt software implementation
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Hardware/Software
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Fighting back

• Formal analysis techniques
• contract checking
• behavioral types
• deadlock avoidance
• Language level support for concurreny.
• Lock free programming
• Lock-free data structures
• Software transactional memories

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Transactional Memory
IDEA!
atomic A.withdraw(3) B.deposit(3) end
Herlihy/Moss ISCA 1993

• Steal ideas from the database community.
• atomic does what it says on the tin.
• Directly supports what the programmer is trying
  to do an atomic transaction against memory.
• Write the simple sequential code, and wrap
  atomic around it.

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How does it work?
Optimistic concurrency
atomic ltbodygt

• Execute ltbodygt without taking any locks.
• Each read and write in ltbodygt is logged to a
  thread-local transaction log.
• Writes go to the log only, not to memory.
• At the end, the transaction tries to commit to
  memory.
• Commit may fail then transaction is re-run

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Transactional Memory

• No races no locks, so you cant forget to take
  one
• No lock-induced deadlock, because no locks
• Error recovery trivial an exception inside
  atomic aborts the transaction
• Simple code is scalable.
• Implementation in Haskell
• orElse combinator

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Summary

• Question reliance on asynchronous concurrent
  programming languages
• digital design
• synchronous reactive systems
• Prepare for alternative computing architectures.
• Formal analysis.
• Software Transactional Memories.