SPW

1
SPW

• Wireless Systems Instructional Design

2
Introduction

• SPW Signal Processing WorkSystem by Cadence
• An integrated environment for system-level
  design, simulation, and implementation that is
  built around the convergence simulation
  architecture combining datapath and control
  constructs in a single simulation environment

3
Introduction

• Overview of the functionality
• Main features
• Component libraries
• BDE
• Signal Calculator
• Simulatior
• Custom block design
• HDS, Fixed-point, FSM

4
Introduction (PR)

• Specify, capture, and simulate your complete
  system design at multiple levels of abstraction
  (e.g. algorithms, hardware and software
  architectures, VHDL and Verilog languages).
• Test and verify your complete system design
  within a "real-world" context.
• Analyze hardware/software architectural
  trade-offs within the context of the overall
  system.
• Maximize design reuse at all stages in the design
  flow so you can avoid "reinventing the wheel.
• Address the convergence of system-level and
  chip-level design

5
Component libraries

• Components are called blocks and are organized
  into libraries
• Communications library
• Wireless LAN library 802.11a/b/g, Bluetooth
• Cellular systems libraries GSM, IS-136, WCDM
• Each block consists of 3 files (views)
• detail views - containing the functionality of
  the block
• symbol view- graphically representing and hiding
  the block detail
• params view (parameter screens) - containing
  editable parameter values

6
BDE

• The Block Diagram Editor (BDE) is the basic
  design environment of the SPW
• Design is created by selecting blocks and
  connecting them in the signal flow network
• A design includes functional objects, such as
  blocks that process signals wires, ports, and
  connectors that carry signals textual objects
  such as parameters and graphic objects such as
  the lines, circles, boxes, and text labels that
  illustrate and describe the functional objects
• Parameter Expression Language (PEL)

7
Signal Calculator

• As the name implies extends the notion of
  hand-held calculator to all types of signal
  waveforms
• read in signal data output files from the
  Simulation Program Builder
• Features
• Can generate sine, square, triangle, sawtooth,
  phasor, impulse, step, ramp, constant, random
  bits, uniform noise, or Gaussian noise
• create and edit real and complex signals
• edit and analyze fixed-point signals
• perform real-time signal acquisition and playback

8
Simulator

• Two simulators
• SPB-Interpreted (SPB-I)
• SPB-Compiled (SPB-C)
• Simulation stages
• Netlist Generation
• Netlist Flattening and Scheduling
• Simulation Run
• In addition to the output signals, the simulator
  produces three types of messages notes,
  warnings, and errors

9
Simulator (cont.)

• Simulation types
• single-rate - universal sampling frequency
• synchronous dataflow (multirate)
• dynamic dataflow (dynamic multirate) - the design
  is scheduled dynamically
• "Hold" Input - enables dynamic behavior of
  single-rate

10
Simulator (cont)

• SPB-I Simulator
• SPB-I is generally the best simulator for
  initially developing and debugging a DSP design.
• It offers a simulation debugger and the best
  dynamic error handling capabilities (for example,
  dynamic overflow).
• The turnaround time for design changes is usually
  shorter with SPB-I because it does not require
  recompiling the simulation program for each
  design change.
• SPB-I is often more efficient than SPB-C for
  exploring the effects of parameter changes.
• Each block in the design needs to have an SPB-I
  model to use this simulator.
• Generally slower simulation performance than
  SPB-C.

11
Simulator (cont.)

• SPB-C Simulator
• After debugging a design with SPB-I, you can use
  SPB-C as a simulation accelerator.
• SPB-C generally gives the fastest simulation
  performance of all the simulators.
• Significant performance improvements in
  multi-clock designs and fixed point arithmetic.
• All blocks in the design must have SPB-C models.

12
Simulator (cont.)

• The Simulation Manager is used to
• Specify the design to be simulated, the type of
  SPW simulator, the simulation run length, and
  other simulation parameters
• Override or sweep parameters in the design.
• Insert probes into the design to monitor internal
  signals.
• Initiate one or more simulation runs on the local
  node and/or remote nodes.
• Initiate debugging sessions with the SPB-I or
  SPB-C debugger.
• Manage the results of multiple simulation runs.
• Transfer simulation results to the Signal
  Calculator (SigCalc).

13
Simulator (cont.)

• Additional simulators
• SPB-C Export allows you to export C models of SPW
  designs to other vendor's simulators.
• SPW-NC directly connects SPW and one of the NC
  simulators to create a co-simulation.
• SPW-AMS enables you to co-simulate SPW and AMS
  blocks in a design.
• SPW-LPS helps you to obtain a power-centric
  analysis of a system design
• RTL Link allows you to simulate your entire
  design as HDL.