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Overview: Fault Simulation

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Fault-free. Detected error. Inserted faults. Three test patterns ... P is the fault-free pattern (value) ... correspondingly, the faulty patterns P1- Pk ... – PowerPoint PPT presentation

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Title: Overview: Fault Simulation


1
Overview Fault Simulation
  • Overview about methods
  • Low (gate) level methods
  • Parallel fault simulation
  • Deductive fault simulation
  • Gate-level fault lists propagation (library
    based)
  • Boolean full differential based (general
    approach)
  • SSBDD based (tradeoff possibility)
  • Concurrent fault simulation
  • Critical path tracing
  • Parallel critical path tracing
  • Hierarchical fault simulation

2
Fault simulation
  • Goals
  • Evaluation (grading) of a test T (fault coverage)
  • Guiding the test generation process
  • Constructing fault tables (dictionaries)
  • Fault diagnosis

Deterministic test generation
No more faults
Select target fault
Random test generation
Done
Generate initial T
Generate test for target
Evaluate T
Fault simulate
Yes
No
Sufficient fault coverage?
Discard detected faults
Done
Modify T
3
Fault simulation
  • Fault simulation techniques
  • serial fault simulation
  • parallel fault simulation
  • deductive fault simulation
  • concurrent fault simulation
  • critical path analysis
  • parallel critical path analysis
  • Common concepts
  • fault specification (fault collaps)
  • fault insertion
  • fault effect propagation
  • fault discarding (dropping)

Comparison of methods
Fault table
Faults Fi
Test patterns Tj
Entry (i,j) 1(0) if Fi is detectable (not
detectable) by Tj
4
Parallel Fault Simulation
Parallel patterns
Parallel faults
Fault-free circuit
Three test patterns
Computer word
001
x1
z
Fault-free
001

011
1
y
x2
x3
101
010
Stuck-at-1
Inserted faults
Stuck-at-0
Faulty circuit
Detected error
Inserted stuck-at-1 fault
000
x1
z
0 1 0

010
1
y
x2
x3
111
000
001
x1
111
z

111
Detected error
1
y
x2
x3
101
010
5
Deductive Fault Simulation
Gate-level fault list propagation
Fault list calculation
1
1
La L4 ? L5 Lb L1 ? L2 Lc L3 ?
La Ly Lb - Lc ------------------------------
----------------------------- Ly (L1 ? L2) -
(L3 ? (L4 ? L5))
b

1
1
2
Library of formulas for gates
1
1
y
0
0
3

0
0
c
4
1
0
a
5
La faults causing erroneous signal
on the node a
Ly faults causing erroneous signal on
the output node y
6
Deductive Fault Simulation
Macro-level fault propagation
Fault list calculated
1
1
b

1
Ly (L1 ? L2) - (L3 ? (L4 ? L5))
1
2
1
1
y
0
0
3

0
0
c
4
1
0
a
5
Solving Boolean differential equation
? Lk
7
Deductive Fault Simulation with DDs
Macro-level fault propagation
Fault list propagated
Ly (L1 ? L2) - (L3 ? (L4 ? L5))
1
1
b

1
1
2
1
Fault list calculation on the DD
1
y
0
0
3

Faults on the activated path
0
0
c
Ly (L1 ? L2)
4
1
0
a
5
First order fault masking effect
Ly (L1 ? L2) - L3
y
1
2
Second order masking effect (tradeoff)
Ly (L1 ? L2) - (L3 ? (L4 ? L5))
3
4
There is a tradeoff possibility between the speed
and accuracy When increasing the speed of
simulation the results will be not accurate
(pessimistic) less fault detected than in
reality
5
8
Deductive Fault Simulation with BDs
Macro-level fault propagation
Fault list calculated
1
1
b

1
Ly (L1 ? L2) - (L3 ? (L4 ? L5))
1
2
1
1
y
0
0
3

0
0
c
4
1
0
a
5
Solving Boolean differential equation
? Lk
9
Concurrent Fault Simulation
  • A good circuit N is simulated
  • For every faulty circuit NF, only those elements
    in NF are simulated that are different from the
    corresponding ones in N
  • These differences are maintained for every
    element x in N in the form of concurrent fault
    list

Example a gate concurrently simulated
0
a
1
c

b
1
Concurrent fault list
10
Concurrent Fault Simulation
Example simple circuit simulated
  • A fault is said to be visible on a line when its
    values for N and NF are different
  • In deductive simulation, only visible faults
    belong to the fault lists
  • In concurrent simulation, faults are excluded
    (dropped) from the fault list only when the
    element in NF is equivalent to the element of N

0
c
a
1
0

e

b
d
1
1
Concurrent fault list
11
Critical Path Tracing
Problems
1
1
1
b


1
1
1
2
0/1
1
1
1
y
y
1/0
0
0
1
3


0
0
c
4
1
1
0
a
5
The critical path is not continuous
y
1
1
2

0
1
1
y
1/0
3
4

1
1
5
The critical path breaks on the fan-out
12
Parallel Critical Path Tracing
  • Handling of fanout points
  • Fault simulation
  • Boolean differential calculus

1011
x1

1110
x2
1011
1
y
1001
x3
x1
F
x2
y
x
xk
Detected faults vector - 10 - T1 No faults
detected T2 x1 ? 1 detected T3 x1 ? 0
detected T4 No faults detected
13
Parallel Critical Path Tracing
Handling of fan-out points in a single tree in
general case
x1
x1
x1,h-1
x2
x
x1,h
x1,1
x1,2
y
x
F
xk
xk1
xn
All the Boolean operations can be carried out in
parallel
14
Parallel Critical Path Tracing
Handling of fan-out points in a network of
nested trees
Two fanouts q, x
.
A,B,D,E chains of Boolean derivatives
All calculations can be carried out in parallel
where
15
Hierarchical Concurrent Fault Simulation
Set of patterns
Set of patterns
With faults
with faults
P
P
(R
)P
( R
)
P
P
(R
)P
( R
)
1
1
n
n
1
1
m
m
High-Level
component
R Faults
P Pattern
High-Level
component
P First Pattern
High-Level
component
Set of patterns
with faults
P
P
(R
)P
( R
)
Sequence
1
1
n
n
of patterns
16
Hierarchical fault simulation
  • Main ideas of the procedure
  • A target block is chosen
  • This will be represented on gate level
  • Fault simulation is carried out on the low level
  • The faults through other blocks are propagated on
    the high level

17
Hierarchical fault simulation
18
Hierarchical fault simulation
  • Definition of the complex pattern
  • D P, (P1,R1), , (Pk, Rk)
  • P is the fault-free pattern (value)
  • Pi (i 1,2, ..., k) are faulty patterns, caused
    by a set of faults Ri
  • All the faults simulated causing the same faulty
    pattern Pi are put together in one group Ri
  • R1- Rk are the propagated fault groups, causing,
    correspondingly, the faulty patterns P1- Pk

19
Fault Simulation with DD-s
Fault propagation through a complex RT-level
component
Decision diagram
B
Sub-system for A
C
A
q?
xA
xc
Dq 1, 0 (1,2,5), 4 (3,4), DxA 0, 1
(3,5), DxC 1, 0 (4,6), DA 7, 3
(4,5,7), 4 (1,3,9), 8 (2,8), DB 8, 3
(4,5), 4 (3,7), 6 (2,8), DC 4, 1 (1,3,4),
2 (2,6), 5 (6,7).
New DA to be calculated
20
Fault Simulation with DD-s
  • Example of high level fault simulation
  • Dq 1, 0 (1,2,5), 4 (3,4),
  • DxA 0, 1 (3,5),
  • DxC 1, 0 (4,6),
  • DA 7, 3 (4,5,7), 4 (1,3,9), 8 (2,8),
  • DB 8, 3 (4,5), 4 (3,7), 6 (2,8),
  • DC 4, 1 (1,3,4), 2 (2,6), 5 (6,7)
  • Final complex vector for A
  • DA 8, 3(4), 4(3,7), 5(9), 7(5), 9(1,8)
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