Computer Organization (Review of Prerequisite Material)

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Computer Organization(Review of Prerequisite
Material)
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Program Specification
Source
int a, b, c, d . . . a b c d a - 100
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Machine Language
Assembly Language
Code for a b c load R3,b load
R4,c add R3,R4 store
R3,a Code for d a - 100 load
R4,100 subtract R3,R4 store R3,d
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von Neumann Computer
Arithmetic-Logical Unit (ALU)
Control Unit
Primary Memory (Executable Memory)
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Primary Memory Unit
0
MAR
1
2
MDR
Command
1234
98765
Read Op
n-1
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Control Unit
3046 3050 3054 3058
Primary Memory
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Control Unit Operation

• Fetch phase Instruction retrieved from memory
• Execute phase ALU op, memory data reference,
  I/O, etc.

PC ltmachine start addressgt IR
memoryPC haltFlag CLEAR while(haltFlag not
SET) execute(IR) PC PC
sizeof(INSTRUCT) IR memoryPC // fetch
phase
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The ALU
load R3,b load R4,c add R3,R4 store R3,a
Right Operand
Left Operand
R1
R2
. . .
Rn
Functional Unit
Status Registers
Result
To/from Primary Memory
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Bootstrapping
Bootstrap loader (boot sector)
1
0x0001000
Primary Memory
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Bootstrapping
Bootstrap loader (boot sector)
1
0x0000100
2
BIOS loader
0x0001000
0x0008000
Loader
Primary Memory
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Bootstrapping
Bootstrap loader (boot sector)
1
0x0000100
2
BIOS loader
0x0001000
0x0008000
Loader
3
0x000A000
OS
Primary Memory
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Bootstrapping
Bootstrap loader (boot sector)
1
0x0000100
2
BIOS loader
0x0001000
0x0008000
Loader
Fetch Unit
3
000A000
PC
0x000A000
Decode Unit
OS
IR

Primary Memory
Execute Unit
4. Initialize hardware 5. Create user
environment 6.
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Von Neumann Computer
Arithmetic-Logical Unit (ALU)
Control Unit
Primary Memory (Executable Memory)
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Device Organization
Application Program
Software in the CPU
Device Controller
Device
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Device Controller Interface
busy
done
Error code
. . .
. . .
Command
Status
Data 0
Data 1
Logic
Data n-1
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Performing a Write Operation
while(deviceNo.busy deviceNo.done)
ltwaitinggt deviceNo.data0 ltvalue to
writegt deviceNo.command WRITE while(deviceNo.bu
sy) ltwaitinggt deviceNo.done TRUE

• Devices much slower than CPU
• CPU waits while device operates
• Would like to multiplex CPU to a different
  process while I/O is in process

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CPU-I/O Overlap
CPU
Device
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Determining When I/O is Complete
CPU
Interrupt Pending
Device
Device
Device

• CPU incorporates an interrupt pending flag
• When device.busy ? FALSE, interrupt pending flag
  is set
• Hardware tells OS that the interrupt occurred
• Interrupt handler part of the OS makes process
  ready to run

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Control Unit with Interrupt (Hardware)
PC ltmachine start addressgt IR
memoryPC haltFlag CLEAR while(haltFlag not
SET) execute(IR) PC PC
sizeof(INSTRUCT) IR memoryPC
if(InterruptRequest) memory0 PC
PC memory1
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Interrupt Handler (Software)
interruptHandler() saveProcessorState()
for(i0 iltNumberOfDevices i)
if(devicei.done) goto deviceHandler(i) /
something wrong if we get to here /
deviceHandler(int i) finishOperation()
returnToScheduler()
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A Race Condition
saveProcessorState() for(i0
iltNumberOfRegisters i) memoryKi
Ri for(i0 iltNumberOfStatusRegisters
i) memoryKNumberOfRegistersi
StatusRegisteri
PC ltmachine start addressgt IR
memoryPC haltFlag CLEAR while(haltFlag not
SET) execute(IR) PC PC
sizeof(INSTRUCT) IR memoryPC
if(InterruptRequest InterruptEnabled)
disableInterupts() memory0 PC
PC memory1
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Revisiting the trap Instruction (Hardware)
executeTrap(argument) setMode(supervisor)
switch(argument) case 1 PC
memory1001 // Trap handler 1 case 2 PC
memory1002 // Trap handler 2 . . .
case n PC memory1000n// Trap handler n

• The trap instruction dispatches a trap handler
  routine atomically
• Trap handler performs desired processing

• A trap is a software interrupt