William Stallings Computer Organization and Architecture

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William Stallings Computer Organization and Architecture

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Add 5 to contents of accumulator. 5 is operand. No memory reference to fetch ... Add contents of cell A to accumulator. Look in memory at address A for operand ... – PowerPoint PPT presentation

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Title: William Stallings Computer Organization and Architecture


1
William Stallings Computer Organization and
Architecture
  • Chapter 11
  • Instruction Sets
  • Addressing Modes
  • and Formats

2
Topics
  • Addressing Modes
  • Instruction Formats

3
Addressing Modes
  • Immediate
  • Direct
  • Indirect
  • Register
  • Register Indirect
  • Displacement (Indexed)
  • Stack

4
Addressing Modes
  • In our discussion
  • Instruction format (one address)
  • A contents of an address field in instruction
  • R contents of an address field referring to a
    register
  • EA effective (actual) address of location
    containing the referenced operand
  • (X) contents of location X

5
Immediate Addressing
  • Operand is part of instruction
  • Operand A
  • e.g. ADD 5
  • Add 5 to contents of accumulator
  • 5 is operand
  • No memory reference to fetch data
  • Fast
  • Limited range

6
Immediate Addressing Diagram
Instruction
Operand
Opcode
7
Direct Addressing
  • Address field contains address of operand
  • Effective address (EA) address field (A)
  • ? EA A
  • e.g. ADD A
  • Add contents of cell A to accumulator
  • Look in memory at address A for operand
  • Single memory reference to access data
  • No additional calculations to work out effective
    address
  • Limited address space

8
Direct Addressing Diagram
Instruction
Address A
Opcode
Memory
Operand
9
Indirect Addressing (1)
  • Memory cell pointed/referenced to by address
    field ? Memory location A contains the address of
    (pointer to) the operand
  • EA (A)
  • Look in A, find address (A) and look there for
    operand
  • e.g. ADD (A)
  • Add contents of cell pointed to by contents of A
    to accumulator

10
Indirect Addressing (2)
  • Large address space
  • 2n where n word length
  • May be nested, multilevel, cascaded
  • e.g. EA (((A)))
  • Draw the diagram yourself
  • Multiple memory accesses to find operand
  • Hence slower

11
Indirect Addressing Diagram
Instruction
Address A
Opcode
Memory
A
Pointer to operand
Operand
12
Register Addressing (1)
  • Operand is held in register named in address
    filed
  • EA R
  • Limited number of registers
  • Very small address field needed
  • Shorter instructions
  • Faster instruction fetch

13
Register Addressing (2)
  • No memory access
  • Very fast execution
  • Very limited address space
  • Good for intermediate result in a calculation
  • Multiple registers helps performance
  • Requires good assembly programming or compiler
    writing

14
Register Addressing Diagram
Instruction
Register Address R
Opcode
Registers
Operand
15
Register Indirect Addressing
  • EA (R)
  • Operand is in memory cell pointed to by contents
    of register R
  • Large address space (2n)
  • One fewer memory access than indirect addressing

16
Register Indirect Addressing Diagram
Instruction
Register Address R
Opcode
Memory
Registers
Operand
Pointer to Operand
17
Displacement Addressing
  • EA A (R)
  • Address field holds two values
  • A base value
  • R register that holds displacement
  • or vice versa

18
Displacement Addressing Diagram
Instruction
Address A
Register R
Opcode
Memory
Registers

Pointer to Operand
Operand
19
Relative Addressing
  • A version of displacement addressing
  • R Program counter, PC
  • EA A (PC)
  • i.e. get operand from A cells from current
    location pointed to by PC
  • Exploit locality of reference cache usage

20
Base-Register Addressing
  • A holds displacement
  • R holds pointer to base address
  • R may be explicit or implicit
  • e.g. segment registers in 80x86

21
Indexed Addressing
  • A base
  • R displacement
  • EA A (R)
  • Autoindexing
  • Good for accessing arrays
  • EA A (R)
  • R

22
Combinations
  • Postindex
  • EA (A) (R)
  • Preindex
  • EA (A(R))
  • (Draw the diagrams)

23
Stack Addressing
  • Operand is (implicitly) on top of stack
  • e.g.
  • ADD Pop top two items from stack and add
  • Refresh your memory What addressing modes did
    you study when you took CS351?

24
Summary
25
Instruction Formats
  • Layout of bits in an instruction
  • Includes opcode
  • Includes (implicit or explicit) operand(s)
  • Usually more than one instruction format in an
    instruction set

26
Instruction Length
  • Affected by and affects
  • Memory size
  • Memory organization
  • Bus structure
  • CPU complexity
  • CPU speed
  • Tradeoff between powerful instruction repertoire
    and saving space

27
Allocation of Bits
  • Number of addressing modes
  • Number of operands
  • Register versus memory
  • Number of register sets
  • Address range
  • Address granularity

28
Example of Design Principles - PDP-10
  • Orthogonality
  • Principle by which two variables are independent
    of each other
  • In the context instruction set other elements of
    an instruction are independent of the opcode
  • E.g., addressing mode does not depend implicitly
    on the operation
  • Completeness
  • Each arithmetic data type should have a complete
    and identical set of operations
  • Direct addressing
  • Vs. base displacement in PDP -8

29
PDP-10 Instruction Format
30
PDP-11 Instruction Format
31
Example of Design Principles - VAX
  • Principles
  • All instructions should have the natural number
    of operands
  • All operands should have the same generality in
    specification
  • Result highly variable instruction format (CISC)
  • Objective provide a powerful and flexible tool
    for developing programs to a programmer such as a
    compiler writer ?
  • Efficient compilation
  • Effective and efficient use of CPU
  • Penalty?

32
Foreground Reading
  • Stallings chapter 11
  • Intel and PowerPC Web sites
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