Title: Fundamental Principles of Packet Switch Design
1Chapter 3
- Fundamental Principles ofPacket Switch Design
2Fig. 3.1. Packet arrivals in a 4x4 packet switch
3Fig. 3.2. Input packet processor
4 Simplify VCI assignment algorithm Reduce
blocking due to shortage of valid VCI
5- Waiting System
- Contention Resolution mechanism to select
packets - to be switched
- Losing packets buffered at inputs or
internally - Output buffers needed if group size is greater
than 1 - Throughput can be made arbitrarily close to 100
6Fig. 3.3. (a) Speeding up switch operation by N
times
7Fig. 3.3. (b) Dropping packets that cannot be
switched
8Fig. 3.3. (c) Queueing packets that cannot be
switched
9- Interconnection Networks
- Originally intended for multiprocessor computer
- interconnect
- distributed, self-routing algorithms
- regular topological interconnection pattern
- Rearrangeable nonblocking in circuit switching is
the - same as internally nonblocking in packet
switching - Speed is the practical difference !
10- Loss System
- No input or internal buffers. Packets may need
to queue - at outputs if group size is greater than 1
- Packets may be dropped where contention
arises. - Loss probability can be made arbitrarily small
11Fig. 3.4. (a) shuffle-exchange (omega) network
(b) reverse shuffle- exchange
network (c) banyan network (d) baseline network
12Fig. 3.5. Routing in the banyan network
13Fig. 3.6. Internal and external conflicts when
routing packets in a banyan network
14- Loss probability in a Banyan Network
15Fig. 3.7. Loss probability of the Banyan network
operating as a loss system
16- Combinatoric Properties of Banyan Networks
17- 3.2.4 Nonblocking Conditions for the Banyan
Networks - Banyan network is nonblocking if active inputs
- x1, xm, (xi, gt xj, if j gt 1) and their
targeted outputs - y1, ym satisfy
- 1.) Distinct and monotonic outputs
- y1 lt y2 lt lt ym or ym gt gt y2 gt y1
- 2.) Concentrated inputs
18- Fig. 3.8. (a) An example showing the banyan
network - is nonblocking for sorted
inputs
- Fig. 3.8. (b) Nonblocking sort-banyan network
19Fig. 3.9. (a) Labeling of nodes in the banyan
network
20Fig. 3.9. (b) Sequence of nodes traversed by a
packet from input an a1 to
output bn b1
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22- Proof Two packets
- 1st packet x ana1 y
b1bn - 2nd packet x ana1 y b1bn
- collide in stage k
23- But if conditions are satisfied
- 1.) There are x x 1 active inputs
- between x and x
- They must have distinct outputs
- 2.) y y 1 gt number of distinct
outputs - x x 1
- i.e. y y gt x x
24Fig. 3.10. An example of unsorted packets having
no conflict in the banyan network
25Fig. 3.11. Sorted packets (in P.19) remains
unblocked after their inputs are
shifted (mod 8) by 6
26Routing bits are used starting from L.S.B to
M.S.B.
27Fig. 3.12. (a) Sorting network switches correctly
when all inputs are active and have no
common outputs
Fig. 3.12. (b) Sorting network switches
incorrectly when some inputs are inactive
Fig. 3.12. (c) Sorting network switches
incorrectly when some inputs have common outputs
28- Fig 3.13. An example showing that dummy packets
with - nonconflicting destinations may be
introduced - to make the sorting network switch
correctly - when not all inputs are active,
this requires - knowledge of the destinations of
active inputs
29Fig. 3.14. (a) A comparator
Fig. 3.14. (b) A compact way of representing a
comparator
30Fig. 3.15. (a) A 4x4 sorting network -- Compact
representation
Fig. 3.15. (b) A 4x4 sorting network -- Full
representation
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32- Order-preserving Property
- Suppose a comparison network maps input sequence
- a lt a1, , aN gt to output sequence b lt b1, ,
bN gt, - Then for any monotonically increasing function
f(.), - it maps f(a) lt f(a1), , f(aN) gt to f(b) lt
f(b1), , f(bN) gt - ( Basic idea large numbers remain larger (no
smaller) than - small numbers after mapping
- ? Comparator states do not
change )
33- Fig. 3.16. Illustration that a comparator has the
- order-preserving property
34- Fig. 3.17. (a) The inputs and outputs of a
comparator at stage - d when input sequence is a
- Fig. 3.17. (b) The inputs and outputs of the same
comparator - when input sequence is f(a)
35Fig. 3.18. Illustration of the proof of the
zero-one principle
36Fig. 3.19. Sorting based on merging, successive
shorter sorted sequences are
merged into longer sorted sequences
37- Example of sorting by merger
38Fig. 3.20. Bitonic Sorters
or
The two input sequences do not have to be the
same length The two input sequences are of
opposing directions
39Fig. 3.21. A half-cleaner
40Fig. 3.22. Operations performed by a half-cleaner
for different cases
41Fig. 3.22. Operations performed by a half-cleaner
for different cases
42- Examples of Bitonic Sequence (Circularly Bitonic)
43- Physical picture of half-cleaner action on
arbitrary-number - bitonic sequence
44Fig. 3.23. Recursive construction of a k-bitonic
sorter (merger)
45- Fig. 3.24. (a) A sorting network based on merging
using - bitonic sorters
- Fig. 3.24. (b) The same network broken down into
comparators
46Fig. 3.25. The operation of a comparator used in
a sorting network for packet
switching
47Fig. 3.25. The operation of a comparator used in
a sorting network for packet
switching
48Fig. 3.24(1) Recursion for Odd-even Sorting
Network
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53Fig. 3.26. An 8x8 Batcher-banyan network
54- Number of comparators in a Batcher bitonic
sorting network - f(k) stages in a k-bitonic sorter
- log2k
55Fig. 3.27. (a) Three-phase scheme for sort-banyan
network ( Stage 1 probing
for conflict )
56Fig. 3.27. (b) Three-phase scheme for sort-banyan
network ( Stage 2
acknowledgement of winning packets )
57Fig. 3.27. (c) Three-phase scheme for sort-banyan
network ( Stage 3 routing
winning packets )
58- Packet switching with Clos networks
- ?The Clos network first studied by C. Clos in
1953 - ?Features
- Rearrangeably non-blocking
- Requires centralized route assignment
- Self-routing is impossible in genernal 1
- 1 B.G. Douglass and A.Y. Oruc, On self-routing
in Clos connection networks, IEEE Trans. On
Commun., Vol. 41, No. 1, Jan 1993, pp.121-124
59- 3.4.1 Non-blocking Route Assignment
- Generalization of the sort-banyan principle
- The non-blocking and self-routing properties of
Clos network - Simple route assignment with an appropriate
addressing scheme - General Clos-type network from the cascade
combination of a MIN and its reverse network
60 61 62- A sufficient non-blocking condition
- Let p (s1, d1), , (sn, dn)
- An assignment f p? C is non-blocking if
63- A fundamental lemma
- Let x1, x2,, xn be a strictly monotonic
sequence of integers and for all i, define - g(xi) miq for all i
- where m and q are constant integers. Then
64- Proof
- Without loss of generality, assume that the
sequence is increasing and let i lt j. We have
65- Rank-based assignment algorithm
- Route assignment based on the rank of each
connetion request - Let p (s1, d1),,(sn, dn) be monotonic. The
assignment - f (s1, d1) m iq
- where m is a constant integer and i is the rank
of connection (si, di) in p, is non-blocking 2 - 2 K. Sezaki, Y. Tanaka and M. Akiyama, N1
Connection Switching Networks Suited for Time
Division Switching, Computer Networks and ISDN
Systems, No. 20, 1990, pp. 383-389
66- Proof
- The sequences (s1,, sn) and (d1,, dn) are
monotonic - Let
- g1(si) f (si, p(si)) f (si, di) m
iq - g2(di) f (p-1(di), di) f (si, di) m
iq - Thus f (si, di) f (sj, dj) implies
- g1(si) g1(sj) and g2(di) g2(dj)
Hence the assignment is non-blocking
67 68- Order preserving property
69- 3.4.2 Recursiveness
- ? Consider a 3-stage Clos network with parameter
p0 and q0. - Let the rank of a packet from si to di be r0(si)
- ?The middle-stage module assigned to the request
(si, di) is r0(si)q0 which can be obtained by
decomposing r0(si) - r0(si) a1(q0) a0
? Suppose the subnetwork has parameters p1 and
q1. The route assignment in the subnetwork
is
70- If N q0q1qn-1 , number of stages 2n 1
r0(si) a1(q0) a0 (a2(q1) a1)q0
a0 a2q1q0 a1q0 a0
((a3(q2) a2)q1 a1)q0 a0 a3q2q1q0
a2q1q0 a1q0 a0
The routing tag is (a0,a1,a2,,an-2,ßn-1,ßn-2,
,ß1,ß0)
71- Example
- Benes network qi 2 for all i
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73- General Clos-type Networks
74 75- The Reverse Omega Network
76 77- Cascading a MIN and its reverse network results
in a - general Clos-type network
?Unique path for each input-output pair in MIN
and its reverse network ?Total N/p alternate
paths in Clos-type network
78- Self-Routing Properties of Sort-Clos Network
Problems
3 J.Y. Hui and E. Arthurs, A Broadband Switch
for Integrated Transport, IEEE JSAC, Vol. SAC-5,
No. 8, Oct. 1987, pp. 1264-1273
79- Multicast connections
- ?Extension to broadcast Clos network
- ?Let the set of active inputs be (s0,s1,,sn-1)
- Let their corresponding sets of outputs be
(D0,D1,,Dn-1) - The set of connection requests is monotonic if
?Non-blocking route assignment by the Rank-based
Assignment Algorithm
80 81?Routing from input to middle-stage modules by
decomposing the rank
?Routing tag to middle-stage module
(a0,a1,,an-2) ?Replication and routing
controlled by the General Interval Splitting
Algorithm
82- General Interval Splitting Algorithm
- ?Each packet is assigned an address interval
represented by minimum and maximum
min (i-1) mn-1 m2n-2 max (i-1) Mn-1 M2n-2
?Replication is controlled by the digits mi and Mi
83- General Interval Splitting Algorithm (continued)
- The following procedure is performed
- If mi Mi , then send the packet out on link mi
- If mi ? Mi , then (Mi - mi 1) copies are
required Replicate the packet, modify the headers
and send the packets out on link mi to Mi
84 85 86- Decomposition and generalization
87- Generalized copy network architectures
88- Conclusions
- ?The principle governing the non-blocking and
self-routing properties of a large class of
interconnection networks - ?Non-blocking and self-routing properties of Clos
networks - ?Construction of a general Clos-type network by
cascade combination of any MIN and its reverse
network - ?Extension to multicast network based on
broadcast Clos network
END