DC-DC converter R - PowerPoint PPT Presentation

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DC-DC converter R

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Irradiation of FY06 test chip at LBNL 88' cyclotron. Design and submission of new realistic size test chip. Multi-project run submission in Feb. ... – PowerPoint PPT presentation

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Title: DC-DC converter R


1
DC-DC converter RD US ATLAS Upgrade
  • UCSC
  • May 2007

2
Credits
  • FY07 P. Denes, R. P. Ely, M. Garcia-Sciveres, M.
    Gilchriese, J. Alonso.
  • FY08 same.

3
Progress in FY07
  • Irradiation of FY06 test chip at LBNL 88
    cyclotron
  • Design and submission of new realistic size test
    chip
  • Multi-project run submission in Feb.
  • Chips have been already received April 17, 2007.
  • Initial basic testing with probes in progress
  • PCB test board in fabrication
  • If test boards results as expected, produce strip
    stave compatible power card that can be used in
    place of serial power adapter.

4
Top level schematic
Charge to gate drivers
Clock inputs (same freq. with varying delays)
1mF pump capacitors
These components could be internal eventually
Load
5
Simulation results 1
Charge lost in switch parasitics
Dominated by switch resistance
6
Simulation results 2
Startup circuit
1MHz, 1mF pump caps
7
Plans for FY08
  • Collaborate with CERN for testing and irradiation
    of FY07 test chip
  • In 2006/7 CERN has started an aggressive DC-DC
    RD program already funded at the 1.5 FTE level
  • gt300K additional Europe-only funding for DC-DC
    is being sought by CERN in the form of an FP7_CNI
    proposal to be submitted in May 07.
  • CERN IC group now working on a switching chip for
    an inductive converter along similar lines as the
    LBNL DC-DC work (with a different foundry)
  • They Plan to explore piezo-electric converter
    options as well and establish a test program to
    compare all 3 approaches (inductive, capacitive,
    piezo).
  • They have X-ray irradiation equipment for total
    ionizing dose characterization.
  • Work on design and submit next version of
    switched capacitor DC-DC chip
  • Aim of this next chip would be miniaturization
    for production of a stand-alone device.
  • Main challenges of miniaturization
  • Reduction of external components
  • Control circuitry to internally produce required
    switching signals

8
FY09
  • Depends on success of FY08 effort
  • To be conservative assume a new chip iteration
  • An important possibility if FY07 and F708 chips
    are successful is to shift to improving radiation
    hardness, which may require migrating working
    design to a different switch technology
  • Complete miniaturization work by producing a
    ceramic hybrid to achieve the smallest possible
    package
  • Produce parts that can be used like off the
    shelf components

9
DC-DC Cost breakdown FY08-09
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