Warm Electronics: Components/Subsystems Test Results

1
Warm Electronics Components/Subsystems Test
Results
PACS SVR

• B. Voss

2
BOLC FM

• errors occurred during thermal vacuum acceptance
  tests
• three housekeeping channels found unstable during
  cold start up test (-30C)
• failure seems to be temperature dependent
  (possibly a week soldering)
• tests are stopped and BOLC is sent back for
  repair
• tests will be resumed and partly repeated
  (vibration in at least one axis)

3
DEC/MEC QM

• equipped with complete nominal section
• currently running at MPE
• long duration tests
• digital interfaces without errors or malfunctions
• analogue interfaces OK except
• SPU current housekeeping, known problem with
  wrong gain setting in DEC/MEC. Corrected for FM
• CRE interfaces tested OK during acceptance test,
  but no long term tests available.

4
DEC/MEC FM

• in production
• schedule delayed by two main problems
• FPGA swap on both DEC Base boards
• repair envisaged due week 29
• rearranging test order because of availability of
  test facilities
• erroneous SPU boards
• FM will be temporary equipped with erroneous SPU
  boards thus EMC and environmental test can be
  performed in time
• only small likelihood of malfunction during tests
• later exchange of the SPU boards and delta
  acceptance

5
DEC/MEC FM

• new schedule by CSL
• repair due week 29
• functional test and vibration due week 32
• thermal vacuum due week 33
• functional retest due week 34
• EMC test at ESTEC due week 35
• delivery to MPE begin of September

6
DPU PFM

• functional Tests at CGS OK
• thermal Tests OK
• EMC Test OK (minor NCRs, solved/accepted)
• possible problems
• CFM2 showed corrupted memory after some hours of
  operation at MPE
• AVM2 in same configuration is running stable
• possible reasons currently under investigation
  (HW or SW problem?)
• errors not reproducible at CGS
• PFM now at MPE for comparative tests

7
SPU PFM

• thermal tests OK
• EMC test OK (minor deviations already accepted)
• functional test failed under special conditions
• during acceptance test campaign 15.05.06
  malfunction occurred (CRISA FPL-NC-1214-077-CRS)
• start-up SW reports error during application
  upload command
• error affects read from DSP program memory (PRAM)
  with special bit patterns (all 1s to all but one
  bit 0s)
• error is systematic and affects all DSP boards
  (PACS SPU, PACS DECMEC and LFI REBA)

8
SPU PFM

• reason of error
• not clearly understood yet, but most likely a
  ground bouncing problem when switching output
  stages in the PRAMs
• repair
• repair of EBB with additional ground wires on the
  board improved the situation
• modification of flight spare currently under
  progress

9
Harnesses

• Warm Interconnect Harness
• QM at MPE
• QM showed different weaknesses (bad bonding,
  wrong back shells, swapped wires in cable
  bundles)
• FM production will take care of these
• Cryo Harness
• complete and tested
• differences in resistance measurements compared
  to MPE test harness
• reason under investigation but most likely due to
  different measurement systems