A1256654098ExfOB

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Chapter 3 DC and Parametric Measurements
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• Continuity
• Purpose of Continuity Testing
• ATE to Test Head connection

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• Purpose of Continuity Testing
• Electromechanical relays

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• Continuity
• Continuity Test Technique
• On chip protection diodes
• Protect input and output from Electrostatic
  Discharge (ESD) and other overvoltage
• Pins have either one or two reverse biased diodes

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• Continuity
• Continuity Test Technique
• Force current - measure voltage
• DUT power supplies are grounded
• Current level is usually between 100uA and 1mA
• Diodes connected to the positive supply - current
  forced in
• Diodes connected to the negative supply - current
  forced out
• Output diode voltage drop usually is between
  550mV and 750mV
• If tester does not see diode voltage drop or the
  current reaches its voltage clamp, the test fails

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• Continuity
• Serial vs. Parallel Continuity Testing
• Serial is one pin at a time
• Test time intensive
• Parallel can not see pin to pin shorts
• Alternating odd and even pin parallel test
• Analog parallel per-pin measurement is not
  available in some testers
• Single current source and volt meter can be used
  one pin at a time
• Digital per-pin measurement is available, but may
  introduce noise into sensitive analog circuit

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• Leakage Currents
• Purpose of Leakage Testing
• Good design should have leakage current of less
  than 1uA
• Detects poorly processed integrated circuits
• Improper operation in customer end application
• Detect weak devices
• Initially function but eventually fail after
  unacceptably short lifetime (Infant mortality)

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• Leakage Currents
• Leakage Test Technique
• Force DC voltage - measure small current
• Typically measured twice
• input voltage equal to positive supply
• input voltage set to ground or negative supply
• Input current high (IIH) and input current low
  (IIL)
• Digital and analog inputs
• Output leakage current (IOZ)
• Measured same as IIH IIL
• output pin must be placed in a high impedance
  (HIZ) state using test modes

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• Leakage Currents
• Serial vs. Parallel Leakage Testing
• Serial is one pin at a time
• Test time intensive
• Less possibility of errors
• Leakage currents can flow from pin to pin
• Alternating odd and even pin parallel test is
  recommended
• Again, analog parallel per-pin measurement is not
  available in some testers
• Single voltage source and current meter can be
  used one pin at a time
• Again, digital per-pin measurement is available,
  but may introduce noise into sensitive analog
  circuit

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• Power Supply Currents
• Importance of Supply Current Tests
• Fast method for determining catastrophic failure
• Large current draw from power supplies
• Tests are run early in test protocol to weed out
  defective chips without wasting valuable test
  time
• Customer specific application characteristic
• Battery operated instruments like a cellular
  phone require minimal current draw by electronics
  

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• Power Supply Currents
• Test Techniques
• Basic test is simple
• Testers have the ability to measure current draw
  from power supplies (Idd and Icc)
• Actual test is never basic
• Test conditions
• must be clearly identified in test plan
• power up mode, standby mode, normal operational
  mode
• digital supply (Iddd and Iccd) and analog supply
  (Idda and Icca) measured separately
• Worst case
• requires complete characterization

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• Test Techniques - cont.
• Multiple power supply pins
• designers may need to know the current flow into
  each pin
• Settling time
• 5 to 10 milliseconds in active mode
• hundreds of milliseconds to stabilize to within
  1mA

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• DC References and Regulators
• Voltage Regulators
• High voltage input - regulated lower voltage
  output
• Output voltage
• simple voltmeter reading
• Output voltage regulation
• ability of regulator to maintain specific output
  under load
• Dropout voltage
• minimum input voltage before output drops below
  specified level
• Input regulation
• ability of regulator to maintain steady output
  with a range of input voltages

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• DC References and Regulators
• Voltage References
• Low power voltage regulators
• Not always accessible from external pin
• test engineer may need to request test modes to
  test references
• May not have a separate specification in the data
  sheet
• DC reference test modes allow the program to trim
  the DC references for more precise device
  operation

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• DC References and Regulators
• Trimmable References
• Allows quality of product to be enhanced during
  testing through fuses internal to the device
• The only aspect of testing that adds value to the
  device
• Fuses, Zener diodes or EEPROM register bits
• Fuses and Zener diodes are blown by forcing a
  controlled current through them
• fuses blow to an open circuit
• diodes blow to a short circuit
• Laser trimming - (only possible on wafer)
• On-Chip resistor are trimmed to increase
  resistance
• Also used to trim gain and offset of analog
  circuits
• Trimming is sometimes performed after packaging
  to account for packaging effects

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• Impedance Testing
• Input Impedance
• Very common specification for analog inputs
• Force two voltages - measure differences in
  current
• single voltage / current is not sufficient to
  eliminate bias current and unknown termination
  voltages
• data sheet will list the appropriate range for
  voltage
• Input impedance is equal to change in voltage
  divided by the change in current
• Alternative method force two controlled currents
  and measure the voltages
• used in cases where low input impedance would
  cause excessive current flow into the device
• data sheet will list the appropriate ranges of
  current

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• Impedance Testing
• Output Impedance
• Typically much lower than input impedance
• Measured with a force current measure voltage
  method
• Differential Impedance Measurements
• Force two differential voltages and measure the
  differential current change

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• DC Offset Measurements
• Output Offset Voltage
• The difference between the devices ideal output
  voltage and its actual output voltage
• Basic test is fairly simple
• Difficulties
• AC components or noise riding on the DC signal
• Requires filtering
• analog low pass filter
• digital averaging which functions like a low pass
  filter
• ATE parasitic capacitance
• causes some op amps to oscillate
• may need a buffer amplifier

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• DC Offset Measurements
• Input Offset Voltage
• Output offset voltage referenced back to its
  input
• Input offset voltage divided by the gain of the
  circuit
• definition assumes that the offset is all
  attributed to the input, when in reality, the
  offset could be caused by internal factors as
  well
• Single Ended, Differential, and Common Mode
  Offsets
• Single ended offsets are measured relative to
  ideal voltage
• Differential offset is the difference between two
  outputs of a differential circuit.
• Common mode offset is the average voltage level
  at two outputs of a differential circuit compared
  to an ideal common mode voltage

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• DC Gain Measurements
• Closed Loop Gain
• Single input
• Change in output divided by the change in input
• Use a voltmeter to measure output
• input should be stable to within 1mV
• may need testers high accuracy voltmeter to
  measure the values
• Differential input
• Change in differential output divided by change
  in differential input
• DC offsets at the input are cancelled out
• Use a differential voltmeter

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• DC Gain Measurements
• Open Loop Gain
• Defined as the amplifier gain with no feedback
  path from the output to the input.
• Difficult to test since op amp gains can be very
  high
• measured using a second op amp in the feedback
  path
• nulling amplifier can also be used to measure the
  input offset voltage

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• DC Power Supply Rejection Ratio
• DC Power Supply Sensitivity (PSS)
• Measure of the ability of a circuit to maintain a
  steady output voltage while the power supply
  voltage changes slightly

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• DC Power Supply Rejection Ratio
• DC Power Supply Rejection Ratio (PSRR)
• PSS of the circuit divided by the gain of the
  circuit in its normal mode of operation
• PSRRdb 20 log PSS/G

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• DC Common Mode Rejection Ratio
• CMRR of Op Amps
• A differential circuits ability to reject a
  common mode signal at its inputs
• There are two circuits used to measure CMRR
• Resistor matching is a major source of error.

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Op amp CMRR Test Setup
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CMRR Test Setup using Nulling Amplifier
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• DC Common Mode Rejection Ratio
• CMRR of Differential Gain Stages
• Circuits that use op amps to perform a function
• The CMRR of the op amp is not as critical as the
  CMRR of the circuit.
• Resistor matching is critical in these circuits
• Difference between chip CMRR and circuit CMRR?
• Chip CMRR - the resistors are on the DIB.
• Circuit CMRR - the resistors are on the DUT.

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CMRR of Differential Gain Stages
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• Comparator DC Tests
• Input Offset Voltage
• Differential input voltage the causes a
  comparator to switch from one output state to the
  other.
• Differential input voltage is ramped from one
  voltage to another to find the point at which the
  comparator changes state.

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• Comparator DC Tests
• Threshold Voltage
• Slicer circuit
• Fixed reference voltage supplied to one input of
  a comparator
• The input offset voltage is replaced by the
  single-ended specification, threshold voltage

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• Comparator DC Tests
• Hysteresis
• The difference in threshold voltage between a
  rising input test condition and a falling input
  condition
• May or may not be a design feature
• Input offset voltage and hysteresis may change
  with different common mode input voltages

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• Voltage Search Techniques
• Binary Searches vs. Step Searches
• Ramping input voltages until an output condition
  is met is called a ramp or step search.
• Very time consuming, not well suited for
  production testing.
• Binary searches use successive approximation
  algorithms
• If you are looking for a transition between 1.45V
  and 1.55V, the comparator input is set to 1.5V
  and the output is observed. If the output is
  high, then the input is increased by one quarter
  of the 100 mV search range (25mV) to try to make
  the output go low. Once the output goes low, the
  input is adjusted by one eighth of the search
  range (12.5mV) and the process is repeated until
  the desired resolution is attained.
• Does not work well in the presence of hysteresis.

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• Voltage Search Techniques
• Linear Searches
• Very fast
• Using two input values, two output values can be
  measured.
• Using the linear equation y m x b, the
  zero crossing values can be calculated.
• Iterative linear searches are used to achieve the
  desired accuracy.

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• DC Tests for Digital Circuits
• IIH / IIL
• Mentioned earlier under leakage currents
• Data sheets list several specification for
  digital inputs and outputs
• Digital I/O lines can also have input leakage
  specifications when they are set in a high
  impedance (HIZ) mode.
• VIH / VIL (input high voltage and low voltage)
• Threshold voltage for digital inputs
• Tested using a binary or step search
• Force levels as a go-nogo test
• to identify VIH / VIL threshold failures,
  rerunning the go-nogo test at a looser test limit
  will reveal the failure.

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• DC Tests for Digital Circuits
• VOH / VOL
• VOH is the minimum output voltage in the high
  state
• VOL is the maximum output voltage in the low
  state
• Usually a verified value not a measured value
• Tested using a go-nogo test
• IOH / IOL
• VOH and VOL are guaranteed with specified load
  currents (IOH and IOL)
• When output is high, the tester must pull current
  out of the DUT.
• When the output is low, the tester must force
  current into the DUT.

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• DC Tests for Digital Circuits
• IOSH and IOSL Short Circuit Current
• Digital outputs often have output short circuit
  protection
• If the output is shorted directly to ground or to
  power, the amount of current flowing into or out
  of the pin is limited to IOSH and IOSL

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• Summary
• DC tests are very easy to define and understand
• Actual testing is usually much more difficult
  than it looks.
• A DC offset of 100mV is easy to measure with an
  accuracy of /- 10mV - very difficult to measure
  with an accuracy of 1uV.
• Accuracy and repeatability are often the most
  time consuming problems faced by an analog test
  engineer.