DLX

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DLX ?????? GPR ?PC

• ?????

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Instruction Formats
R-Type (Register)
I-Type (Immediate)
Opcode, three registers an additional 6-bit
opcode (function)
Opcode, two registers a 16-bit constant
6 5 5 5 5
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6 5 5 16
Opcode RS1 RS2 RD Function
Opcode RS1 RD Immediate
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The Datapath
The Datapath consists of several
environments, buses, registers and multiplexers.
At the right there is a general scheme of the
entire Datapath (no drivers, only muxes).
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The GPR Environment (Mueller Paul)
GPR_WE
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The GPR Environment (Cont.)
GPR_WE
Drivers to enable the writing of a value to the
bus.
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The GPR Environment (Cont.)
GPR_WE
A1, A2 are the registers to be read from and A3
is the register to be written to. Their values
are trivial-derived from the IR register.
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The GPR Environment (Cont.)
GPR_WE
R0 always equals zero Zero Testers check if A1
or A2 equal zero.If so, the A1Zero / A2Zero
signals equal zero.
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The GPR Environment (Cont.)
GPR_WE
a read from R0 results with a zero value written
to the appropriate register (A or B).
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The GPR Environment (Cont.)
GPR_WE
A3 can be either IR1511, IR2016 or 11111.
Its value is according to the instructions type
(I-Type or R-Type). The I-Type Control signal
decides what type of instruction we deal with.
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The GPR Environment (Cont.)
GPR_WE
When dealing with the jalr instruction, we have
to write to R31 and at that case, the Jlink
signal gets the value of 1.
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The GPR Environment (Cont.)
GPR_WE
Remember The GPR Env. is a dual-port RAM that
supports either two Read operations or one write
operation at a certain time.
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The PC Environment
The PC Env. is implemented as follows
This constant is used in the Decode stage when
advancing the PC to be PC1
When the computer is turned on, the PUP signal1
, the MUX and the Control signal PCsce get a 1
value and as a result the PC is initialized to
the address.
The DINT bus feeds the new PC.
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(No Transcript)
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Problem 1
xor r1 r19 r20 beqz r1 1 add r16 r17 r18 sub r16 r
16 r19
if(ij) goto L1 fgh L1 ff-i
LEGEND r16 f r17 g r18 h r19 i r20
j r21 k
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Problem 2
xor r1 r19 r20 bnez r1 2 add r16 r17 r18 beqz r1 1
sub r16 r17 r18
if(ij) skip to else fgh else fg-h
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Problem 3
addi r4 r0 Astart add r1 r4 r19 lw r2 r1 0 add r1
7 r17 r2 add r19 r19 r20 xor r3 r19 r18 bnez r3 -
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LOOP gg Ai iij if((i!h) goto LOOP
Address of A0 Astart