chapter one transparency

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Chapter 11 68HC11 Analog to Digital Converter
The 68HC11 Microcontroller
Han-Way Huang
Minnesota State University, Mankato
2
Basics on A/D Conversion - Almost any measurable
quantity, for example, current, voltage,
temperature, speed, and time, is analog in
nature. - Analog signals must be represented in
digital format in order to be processed by the
digital computer. - An analog to digital (A/D)
converter can convert a electrical voltage to a
digital value. - A non-electrical quantity must
be converted into electrical voltage before it
can be converted into digital value. - A
transducer is normally used to convert a
non-electrical quantity into a electrical
voltage so that it can be further processed by a
computer. - The accuracy of an A/D converter is
dictated by the number of bits it used to
represent the digital value. - An A/D conversion
system is illustrated in Figure 10.1
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Successive Approximation Method
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Algorithm of Successive Approximation Method
Starting the most significant bit of SAR, for
each bit 1. Guess the bit to be a 1. 2. Converts
the value of the SAR to an analog voltage 3.
Compares the D/A output with the analog
input. 4. Clears the bit to 0 if the D/A output
is larger.
6

• Optimal Voltage Range for the A/D Converter
• A/D converter needs a low reference voltage and
  a high reference voltage to operate.
• The low reference voltage (VLREF) is often set
  to 0 and the
• high reference voltage (VHREF) is often set to
  VCC.
• Most A/D converters are ratiometric.
• To take advantage the whole dynamic range of
  the A/D converter, we should set scale and
• shift the sensor output to VLREF VHREF.
• The A/D conversion result x corresponds to an
  analog voltage given by
• Vx VLREF (range ? x) ? (2n 1)
• where, range VHREF VHREF

7
Example 11.1 Assume there is a 12-bit A/D
converter with VLREF 0V and VHREF 5V. Find
out the corresponding voltage values for A/D
conversion results of 100, 400, 800, 1200, and
2400. Solution range VHREF VLREF 5
V. V(100) 0V (100 ? 5) ? (212 1) 0.12
V V(400) 0V (400 ? 5) ? (212 1) 0.49
V V(800) 0V (800 ? 5) ? (212 1) 0.98
V V(1200) 0V (1200 ? 5) ? (212 1) 1.46
V V(2400) 0V (2400 ? 5) ? (212 1) 2.93 V
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Voltage Scaling Circuit

• Example 11.2 Convert the output voltage of an A/D
  converter from 0-200mV to the range
• of 0-5V.
• Solution
• AV 1 (R2/R1) (5V/0.2V) 25
• R2/R1 24
• Choose 10K for R1, then R2 240K.

9
Voltage Scaling and Shifting Circuit Can
translate a voltage from V1 - V2 to the range
of 0V 5V.
10
Example 11.3 Use the circuit in Figure 11.5 to
scale and shift the transducer output from -2.5
2.5 V to 0 5V. Solution 0 Rf ? R1 (- 2.5)
Rf ? R2 V1 ---- (1) 5 Rf ? R1 (2.5)
Rf ? R2 V1 ---- (2) By choosing V1 -
12V and Rf 5KW, R1 and R2 are solved to be 5KW
and 24KW. R0 is independent of other parameters,
we arbitrarily set it to 5 KW.
11
An Overview of the 68HC11 A/D Converter - Eight-c
hannel, 8-bit, multiplexed input,
successive-approximation conversion method. - A
weighted array of capacitors are used to
implement the successive-approximation method. -
A clock signal is required to control the A/D
conversion that must have a frequency no lower
than 750 KHz. - Reference voltages are required
for the conversion one is high reference (VRH)
voltage, the other is low reference (VRL)
voltage. The difference between VRH and VRL
cannot be lower than 2.5 V. - Accuracy is only
guaranteed for VRL 0 V and VRH 5 V. - The
conversion is ratiometric. The input voltage VRL
converts to 00 and the input voltage VRH
converts to FF.
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The Clock Frequency Issue - The A/D converter
requires a clock to operate. - Either the E clock
or the on-chip RC clock signal can be used. - The
RC clock runs at 1.5 MHz. - To choose the E clock
signal, clear the bit 6 of the OPTION register to
0. - To select RC clock signal, set the bit 6 of
the OPTION register to 1. This circuit
requires 10 ms to start and settle. - The 68HC11
completes the conversion of one sample in 32
clock cycles. Registers Related to the A/D
Operation - ADCTL A/D control/status
register - OPTION bits 7 and 6 - ADR1-4 A/D
result registers 1 to 4
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A/D Control Register (ADCTL)
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The OPTION Register
ADPU A/D power up. When set to 1, it enables
the A/D converter. After setting this bit, the
user must wait at least 100 ms before using the
A/D converter. CSEL clock select. When set to
1, the RC clock signal is selected. Otherwise,
the E clock is selected. It takes 10 ms for RC
clock to stabilize.
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The Procedure for Using the A/D Converter Step
1. Connect the hardware properly. Scale and
shift the analog inputs, when necessary, so
that they fall between VRH and VRL. Step 2. Set
the ADPU bit of OPTION register to enable the A/D
converter. Step 3. Select the appropriate clock
signal by setting or clearing the CSEL bit of
the OPTION register. Step 4. Wait for the A/D
converter to stabilize. Step 5. Select the
appropriate channel(s) and operation modes by
programming the ADCTL register. Step 6. Wait
until the CCF flag of the ADCTL register becomes
1 and collect the conversion results.
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Example 11.5 Write an instruction sequence to set
up the following A/D conversion
parameters Nonscan mode Single-channel
mode Select channel AN0 Choose the E clock as
the clock source for the A/D converter Enable
A/D converter Solution Set bit 5 of ADCTL to 0
to select nonscan mode. Set bit 4 of ADCTL to 0
to select single-channel mode. Set bits 3-0 of
ADCTL to 0000 to select channel AN0. Write the
value 00 into the ADCTL register. Set the bit 7
of the OPTION register to enable A/D charge
pump. Clear the bit 6 of the OPTION register to
select E clock as the A/D control clock
signal. Wait for 100 ms for the converter to
stabilize.
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regbas EQU 1000 ADCTL EQU 30 OPTION EQU
39 LDX regbas BCLR OPTION,X 40
select E clock for the A/D clock
signal BSET OPTION,X 80 enable the A/D
charge pump LDY 30 delay for 105 ms
for delay DEY the charge pump to BNE delay
stabilize LDAB 00 STAA ADCTL,X start the
conversion END
19
Example 11.6 Write an instruction sequence to
set up the following A/D conversion parameters
Non-scan mode Multiple-channel mode Select
channels AN4-AN7 Choose E clock as the clock
source for the A/D converter Enable the A/D
converter Solution Set bit 5 of ADCTL to 0 to
select non-scan mode Set bit 4 of ADCTL to 1 to
select multi-channel mode Set bits 3-0 of ADCTL
to 0100 to select channels AN4-AN7 Write the
value 14 into the ADCTL register. Set the bit 7
of the OPTION register to enable A/D charge
pump. Clear the bit 6 of the OPTION register to
select E clock as the A/D control clock
signal. Wait for 100 ms for the converter to
stabilize.
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regbas EQU 1000 ADCTL EQU 30 OPTION EQU 39 LD
X regbas BCLR OPTION,X 40 select the E clock
as the A/D control clock BSET OPTION,X 80
enable the A/D converter LDY 30 wait for 105
ms delay DEY BNE delay LDAB 14
start the A/D conversion STAA ADCTL,X END
21
Example 11.7 Write an instruction sequence to
convert the analog signal connected to channel
AN0 into digital form. Perform four conversions
and stop. Assume the frequency of the E clock
is 2 MHz. Solution 1. Circuit connection is
shown in Figure 11.6.
2. Write one byte into the ADCTL register and
four conversions will be performed. 3. Perform
A/D conversion on the AN0 input in single-channel
and nonscan mode. Write 00 into ADCTL.
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regbas equ 1000 OPTION equ 39 ADCTL equ 30
ADR1 equ 31 ADR2 equ 32 ADR3 equ 33 ADR4
equ 34 org 00 result rmb 4 result four
bytes to hold A/D results org C000 ldx regbas
bset OPTION,X 80 enable the charge pump to
start A/D conversion bclr OPTION,X 40 select
E clock as the clock source to A/D
converter ldy 30 delay for 105 ms to wait for
the charge pump delay dey to
stabilize bne delay ldaa 00 staa ADCTL,X
initialize ADCTL and start the A/D
conversion again ldaa ADCTL,X check CCF
bit bpl again wait until CCF flag is
1 ldaa ADR1,X get the first result
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staa result save it ldaa ADR2,X get the
second result staa result1 save
it ldaa ADR3,X get the third
result staa result2 save it ldaa ADR4,X
get the fourth result staa result3 save
it end
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In C Language, include lthc11.hgt unsigned char
result 4 main ( ) OPTION 0xBF /
select E clock as the A/D clock source / OPTION
0x80 / enable A/D converter / TFLG1
0x40 / clear OC2F flag / TOC2 TCNT
200 / start an OC2 operation with 100 ms delay
/ while (!(TFLG1 0x40)) / wait for 100 ms
/ ADCTL 0x00 / start an A/D conversion
/ while (!(ADCTL 0x80)) / wait until A/D
conversion is complete / result 0 ADR1 /
save A/D conversion results / result 1
ADR2 result 2 ADR3 result 3
ADR4 return 0
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Example 11.8 Take 20 samples from each of the A/D
channels AN0 to AN3, convert them to digital
values, and store them in memory locations from
D000 to D04F. Solution 1. Circuit connection
is shown in Figure 11.7.
2. Perform A/D conversion on channels AN0 to AN3
in multi-channel, non-scan mode. Write the value
10 into ADCTL. 3. Take samples at as regular
intervals as possible. This can be achieved by
starting the next conversion immediately after
the previous conversion has been completed but
before collecting the result.
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N EQU 20 number of samples to be taken per
channel ORG D000 result RMB 80 reserve 80
bytes to store A/D conversion results ORG C000
LDX regbas BSET OPTION,X 80 enable A/D
charge pump BCLR OPTION,X 40 select E clock
to control A/D conversion LDY 30 wait for
105 ms for charge pump to stabilize delay DEY
BNE delay LDAA 10 initialize
ADCTL STAA ADCTL,X LDAB N number of
samples remained to be taken on each
channel LDY result Y points to the buffer
that holds the result wait LDAA ADCTL,X wait
until the current A/D conversion is
completed BPL wait Start the next
conversion immediately so that samples can be
taken more uniformly in time LDAA 10 start
the next A/D conversion STAA ADCTL,X
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The following eight instructions collect the
previous results LDAA ADR1,X fetch the result
from channel 1 STAA 0,Y save the
result LDAA ADR2,X fetch the result from
channel 2 STAA 1,Y save the
result LDAA ADR3,X fetch the result from
channel 3 STAA 2,Y save the result LDAA ADR4,X
fetch the result from channel 4 STAA 3,Y
save the result INY move the result pointer
INY INY INY DECB
decrement the loop count BNE wait END
28
In C Language, include lthc11.hgt unsigned char
result80 main ( ) int i OPTION
0xBF / select E clock as the A/D conversion
clock source / OPTION 0x80 / enable A/D
converter / TFLG1 0x40 / clear OC2F flag
/ TOC2 TCNT 200 / create 100 ms delay
/ while (!(TFLG1 0x40)) / / ADCTL
0x10 / start an A/D conversion / for (i 0
i lt 20 i) while (!(ADCTL 80)) ADCTL
0x10 result 4i ADR1 result 4i 1
ADR2 result 4i 2 ADR3 result 4i
3 ADR4 return 0
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The LM35 Precision Centigrade Temperature
Sensors Pins and circuit connections
Features - No external calibration
required. - Very linear over the temperature
range - Draws only 60 mA from power supply and
has very low self-heating. - Converts the
ambient temperature into voltage
30
Example 11.9 Use the circuit shown in Figure
11.8b as a building block in a system to measure
room temperature. Display the result in two
integer digits and one fractional digit using the
seven-segment displays. Assume the room
temperature never goes below 0 oC and never goes
above 42.5 oC so that the A/D converter of the
68HC11 can be used to perform the conversion and
drive the seven-segment displays. Solution 1. The
voltage output from the circuit shown in Figure
10.6b will be between 0V and 425 mV. 2. Better
precision can be obtained by scaling the voltage
corresponding to 42.5 oC to 5 V. 3. Voltage
scaling circuit is shown is Figure 11.9.
31
Display Circuit
32
Setting of Configuration Data for MC14489 bit 7
no decode, set to 0. bit 6 special decode, set
to 1. bit 5 to 3 bank 5 to 3 hex decode, set to
0. bit 2 bank 2 special decode, set to 1. bit 1
bank 1 hex decode, set to 0. bit 0 normal mode,
set to 1. Format of Display Data
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REGBAS EQU 1000 SPCR EQU 28 SPDR EQU 2A SPSR EQ
U 29 DDRD EQU 09 ADR1 EQU 09 OPTION EQU 39 ADC
TL EQU 30 PORTB EQU 04 PORTD EQU 08 TCNT EQU 0
E TOC2 EQU 18 TFLG1 EQU 23 OC2 EQU 40 mask
to check the OC2F flag of TFLG1 OC2M EQU BF
mask to clear OC2F flag for the BCLR
instruction SP_DIR EQU 3A value to configure
SPI pins directions SPCR_IN EQU 54 value to
initialize SPCR register ADPU EQU 80 mask to
select ADPU bit of the OPTION register ADCLK EQU
40 mask to select CSEL bit of the OPTION
register A2D_INI EQU 00 value to configure A/D
control register TCNT EQU 0E TOC2 EQU 18 TFLG1 E
QU 23
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ORG 00 byte1 RMB 1 storage for temperature
data byte2 RMB 1 byte3 RMB 1 remain RMB 2
to hold the remainder of division oc2cnt RMB 1
output comparison count of OC2 ORG C000 LDX r
egbas LDAA C0 STAA byte1 store the fixed
value of display data LDAA FC STAA byte3
The following 4 instructions initialize the
SPI system LDAA SPDIR set up SPI pin
directions STAA DDRD,X LDAA SPCR_INI
initialize SPI parameters STAA SPCR,X BCLR P
ORTD,X 20 enable SPI transfer to
MC14489 LDAA 45 send configuration data to
MC14489 STAA SPDR,X BRCLR SPSR,X 80
BSET PORTD,X 20 load data into
configuration register
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The following 5 instructions enable the A/D
converter and select E clock to control A/D
conversion process and wait for the charge pump
to stabilize BCLR OPTION,X ADCLK select E
clock for A/D conversion BSET OPTION,X ADPU
enable A/D converter LDY 30 delay 105 ms so
charge pump can stabilize delay DEY BNE del
ay forever LDAA A2D_INI start an A/D
conversion STAA ADCTL,X here LDAA ADCTL,X
BPL here LDAB ADR1,X read the A/D conversion
result CLRA convert to temperature LDX 6
reading IDIV STD remain save the
remainder XGDX swap integer part to
D LDX 10 separate tens and ones
digits IDIV LSLB shift ones digits to upper
half of B LSLB LSLB LSLB
36
STAB byte2 XGDX swap the tens temperature
digit in B ADDB byte1 combine the decimal
pointer specifier with tens digit STAB byte1
LDD remain get back the remainder (in
B) LDAA 10 MUL LDX 6 IDIV compute
remainder 10 ? 6 XGDX ADDB byte2 combine
the ones digit and the fractional
digit STAB byte2 BCLR PORTD,X 20 enable
SPI transfer to MC14489 LDAA byte1 get byte1
and send it out STAA SPDR,X BRCLR SPSR,X 80
wait until 8 bits have been shifted
out LDAA byte2 send out byte2 STAA SPDR,X
BRCLR SPSR,X 80 LDAA byte3 send out
byte3 STAA SPDR,X BRCLR SPSR,X 80
BSET PORTD,X 20 load data into the
display register of the MC14489
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Use OC2 to create 1 second delay LDAB 100 STA
B oc2cnt initialize OC2 count to create 1 s
delay LDX REGBAS BCLR TFLG1,X BF clear
OC2F flag LDD TCNT,X repeat ADDD 20000 STD TOC2
,X wait BRCLR TFLG1,X 40 wait for 10
ms BCLR TFLG1,X BF clear the OC2F
flag LDD TOC2,X DEC oc2cnt BNE repeat JMP fore
ver END
38
C Program for Temperature Measurement include
lthc11.hgt main ( ) unsigned char byte1, byte2,
byte3, temp byte1 0xC0 byte3 0xFC /
store characters degree and C in byte3
/ DDRD 0x3A / configure SPI pin directions
/ SPCR 0x56 / initialize SPI function
/ OPTION 0x80 / start the A/D charge pump
/ OPTION 0xBF / select E clock as the
clock source for A/D conversion / TFLG1
0x40 / clear OC2F flag / TOC2 TCNT
200 / wait for 100 ms / while (!(TFLG1
0x40)) PORTD 0xDF / enable SPI transfer
/ SPDR 0x45 / send configuration data to
MC14489 / while (!(SPSR 0x80)) PORTD
0x20 / disable SPI transfer to MC14489
/ while (1) ADCTL 0x00 / start and A/D
conversion / while (!(ADTCL 0x80))
39
temp ADR1/6 byte1 temp / 10 / place
the tens digit in the lower half of byte1
/ byte2 4 ltlt (temp 10) / place the ones
digit in the upper half of byte2 / temp
(ADR1 6) 10 /6 / compute the first
fractional digit / byte2 temp / combine
the ones and fractional digits / PORTD
0xDF / enable SPI transfer to MC14489
/ SPDR byte1 / send out byte1 / while
(!(SPSR 0x80)) SPDR byte2 / send out
byte2 / while (!(SPSR 0x80)) / / SPDR
byte3 / send out byte3 / while (!(SPSR
0x80)) / / PORTD 0x20 / transfer
data to the display register / TOC2 TCNT
20000 / start OC2 operation with 10 ms delay
/ TFLG1 0x40 / clear OC2 flag / for
(temp 0 temp lt 100 temp -- ) while
(!(SPSR 0x80)) TOC2 20000 / start the
next OC2 operation / TFLG1 0x40 / clear
the OC2 flag / return 0
40

• Measuring the Humidity
• The IH-3605 is a humidity sensor made by HyCal
  Engineering, a division of Honeywell.
• The voltage output for relative humidity 0 to
  100 is 0.8V to 3.9V.
• Pin assignment is shown in Figure 11.12.
• Specifications are shown in Table 11.2.

41
Example 11.10 Construct a humidity measurement
system that consists of the 68HC11, an IH-3605
humidity sensor, and four 7-segment
displays. Solution 1. Use a signal conditioning
circuit to scale and shift the voltage to
0-5V. 2. Use a 1KW resistor and a 0.16mF
capacitor to construct a 1KHz low pass filter. 3.
Use a MC14489 to drive four seven-segment
displays. 4. Blank the most significant digit
when the humidity is not 100. - Send 91 as
the configuration data to blank the most
significant digit. - Send 01 as the
configuration data when the most significant
digit is a 1. 5. Use table lookup method to
translate from A/D result to the relative
humidity.
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Relative Humidity Data Format
44
REGBAS EQU 1000 SPCR EQU 28 SPSR EQU 29 SPDR EQ
U 2A DDRD EQU 09 ADR1 EQU 31 OPTION EQU 39 ADC
TL EQU 30 PORTB EQU 04 PORTD EQU 08 TCNT EQU 0
E TOC2 EQU 18 TFLG1 EQU 23 SP_DIR EQU 3A SPCR_I
NI EQU 54 APDU EQU 80 mask to select ADPU bit
of the OPTION register ADCLK EQU 40 mask to
select CSEL bit of the OPTION register A2D_INI EQU
00 value to initialize the ADCTL
register CONF1 EQU 91 configuration data that
need to blank msd CONF2 EQU 01 configuration
data that display the msd
45
ORG 00 byte1 RMB 1 storage for display
data byte2 RMB 1 byte3 RMB 1 oc2cnt RMB 1
ORG C000 LDX REGBAS LDAA A0 STAA byte1
first byte of the display data is a
constant LDAA SPDIR STAA DDRD,X LDAA SPCR_IN
I initialize the SPI system STAA SPCR,X BS
ET OPTION,X ADPU start A/D charge
pump BCLR OPTION,X ADCLK select E clock as the
clock source of the A/D LDY 30 delay DEY BNE de
lay forever LDAA A2D_INI STAA ADCTL,X here LDAA
ADCTL,X wait until A/D conversion is
complete BPL here
46
LDAB ADR1,X LDY humid_up ABY LDAA 0,Y
lookup the upper byte of the humidity STAA byte2
LDY humid_lo ABY LDAA 0,Y lookup the lower
byte of the humidity STAA byte3 JSR disp_humid
JSR wait_1s JMP forever disp_humid PSHA PSHB PS
HY PSHX LDX REGBAS BCLR PORTD,X 20 enable
SPI transfer to MC14489 LDAA byte2 ANDA F0
check the upper four bits BEQ blank LDAA 01
choose normal hex decode BRA send
47
blank LDAA 91 choose special decode to blank
display send STAA SPDR,X BRCLR SPSR,X 80
wait until the SPI transfer is complete BSET PORT
D,X 20 load data into configuration
register BCLR PORTD,X 20 enable SPI transfer
to MC14489 LDY byte1 LDAB 3 loop_disp LDAA 0,
Y STAA SPDR,X BRCLR SPSR,X 80 wait until
SPI transfer is complete INY DECB BNE loop_disp
BSET PORTD,X 20 load data into display
register PULX PULY PULB PULA RTS wait_1s PSHA
PSHB PSHY PSHX
48
LDX REGBAS DES TSY LDAA 50 STAA 0,Y
initialize OC2 count to 50 LDD TCNT,X loop_50 AD
DD 40000 start an OC2 operation with 20 ms
delay STD TOC2,X BCLR TFLG1,X BF clear
OC2F BRCLR TFLG1,X 40 wait until OC2F is
set LDD TOC2,X DEC 0,Y decrement OC2
count BNE loop_50 INS PULX PULY PULB PULA R
TS humid_up FCB 00,00,,09,10 humid_lo FCB 00
,04,,96,00
49
C Program for Humidity Measurement include
lthc11.hgt unsigned char humid_up
unsigned char humid_lo main (
) unsigned bytes3 / display data
/ unsigned char i, conf_dat / loop index and
configuration data / DDRD 0x3A SPCR
0x54 OPTION 0xBF / select E clock to
control A/D converter / OPTION 0x80 /
start the A/D charge pump / bytes0
0xA0 TOC2 TCNT 200 / create a delay of
100 ms / TFLG1 0x40 / / while
(!(TFLG1 0x80)) / / while (1) ADCTL
0x00 / start an A/D conversion / while
(!(ADCTL 0x80)) / wait until A/D conversion
is complete / if (!(humid_up ADR1
0xF0)) conf_dat 0x91 / choose special
decode mode / else conf_dat 0x01 / choose
normal decode mode /
50
PORTD 0xDF / enable SPI transfer to
MC14489 SPDR conf_dat / send out
configuration data / while (!(SPSR
0x80)) / wait until SPI transfer is complete
/ PORTD 0x20 / load data into
configuration register / bytes1
humid_upADR1 bytes2 humid_loADR1 POR
TD 0xDF for (i 0 i lt 3 i) / send
out humidity data for display / SPDR
bytesi while (!(SPSR 0x80)) PORTD
0x20 / load data into display register
/ TFLG1 0x40 / clear OC2F flag / TOC2
TCNT 20000 / start an OC2 operation / for
(i 0 i lt 100 i) while (!(TFLG1
0x40)) TFLG1 0x40 / clear OC2F flag
/ TOC2 20000 return 0
51
Processing the Results of A/D Conversions - The
results of A/D conversion often need to be
processed. - One of the most useful measurements
of an AC signal is its root-mean-square (RMS)
value. - The RMS value of an AC signal is defined
as
1
T
VRMS
11.7
V2(t)dt
T
0
- The following equation is used to approximate
the RMS value
N-1
1
VRMS
11.8
å
Vi2
N
i 0
- To make equation 10.4 a good approximation of
the real RMS value, samples must be as equally
spaced in time as possible. The more samples
collected, the better the result.
52
Example 11.11 Write a program to compute the
average of the squared values of 64 samples
stored at memory locations starting with the
label sample and save the result at the memory
locations starting with the label
sq_ave. Solution - Two bytes are needed to hold
the square of an 8-bit value. - Three bytes are
needed to hold the sum of 64 16-bit values.
x - Divide-by-64 can be performed by shifting the
dividend to the right by 6 positions.
53
ORG D000 samples FCB sq_sum RMB 3 sq_ave RMB 2
org C000 LDX samples CLR sq_sum
initialize the sum to 0 CLR sq_sum1 CLR sq_
sum2 LDY 64 initialize the loop
count loop LDAA 0,X get a sample TAB
duplicate the sample in B MUL compute the
square of the sample ADDD sq_sum1 add to the
running sum STD sq_sum1 LDAB sq_sum add
the carry to the upper byte ADCB 0 STAB sq_
sum INX move to the next sample DEY
decrement the loop count BNE loop LDAB 6
prepare to shift right 6 places
54
the next five instructions divide the sum by
64 loop1 LSR sq_sum ROR sq_sum1 ROR sq_sum2
DECB BNE loop1 transfer the result to sq_sum
and sq_sum1 LDAA sq_sum1 STAA sq_ave LDAA sq_
sum2 STAA sq_ave1 END
55
Computing the Square Root - A technique for
approximating the square root is based on the
following equation
11.9
- Equation 10.5 can be transformed into
11.10
- The value n is the square root to be found.
Suppose we want to find the square root of
p, and n is the integer closest to the square
root of p, then one of the following
relationships is satisfied
n2 lt p n2 p n2 gt p
- By incrementing i from 0 to n-1, the square
root can be found. For the first
approximation, we will stop when the running sum
is larger than p. The flowchart of the program is
shown in Figure 11.15.
56

57
Example 11.12 Write a program to compute the
square root of the average value computed in
Example 11.11 (stored at sq_ave) and save the
square root at sq_root. Solution sq_root rmb 2
to hold the value of å(2i 1) i rmb 1
CLR sq_root initialize å(2i 1) to
0 CLR sq_root1 LDAB -1 STAB i
initialize i to 0 repeat INC i LDAB i CLRA LSLD
compute 2i 1 ADDD 1 ADDD sq_root
add 2i 1 to accumulating STD sq_root sum
CPD sq_ave compare to n2 BLO repeat repeat
when å(2i 1) lt n2 INC i add 1 to i to obtain
the square root LDAA i place the square root
in sq_root STAA sq_root END
58
Example 11.13 Add a sequence of instructions to
the previous program to find the closest square
root of the square sum. Solution - If n is not
the true square root, then either n or n - 1 is
the closest square root. - The choice can be made
by comparing the following two expressions n2
- p (1) p - (n - 1)2 (2) - The value n is
selected if the expression (1) is smaller.
Otherwise, n - 1 is selected - The program on the
right-hand side should be appended to the program
of the previous example.
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sq_diff1 RMB 2 temp RMB 2 LDAA i place n in
A TAB also place n in B MUL compute
n2 CPD sq_ave compare to p BEQ exit We need
to compare expression (1) and (2) in the
following SUBD sq_ave compute n2 -
q STD sq_diff1 LDAA i DECA compute n -
1 TAB MUL compute (n - 1)2 STD temp LDD sq
_ave SUBD temp compute p - (n -
1)2 CPD sq_diff1 compare p - (n - 1)2 with n2
- p BHI exit n is closer to the true square
root DEC i n - 1 is closer to the true square
root exit
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Example 11.14 Write a C routine to compute the
root-mean-square value of an array of 8-bit
unsigned integers. Solution unsigned char
root_mean_sq (unsigned char samples, unsigned
int n) int i unsigned int sq_ave unsigned
long int sq_sum unsigned int temp sq_sum
0 for (i 0 i lt n i) sq_sum
samplesi samples i sq_ave sq_sum /
n temp 0 i 0 while (temp lt sq_ave)
temp 2 i 1 i if (temp
sq_ave) return i if ((i i - sq_ave) lt (sq_ave
- (i - 1) (i - 1)) return i else return (i -
1)
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Using External A/D Converter MAX1241 - 12-bit
resolution - Use successive-approximation method
to perform conversion and completes one
conversion in 7.5 ms. - Direct interface to SPI
interface. - Analog input ranges from 0 to 5V
with 5V power supply
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MAX1241 Signal Pins CS chip select. The falling
edge of this signal initiates the
conversion. DOUT serial data output. Data
changes state at SCLKs falling edge. AIN analog
input. SCLK serial clock input. SCLK clocks
data out at rates up to 2.1 MHz. GND and VDD
device supply pins. REF analog reference
voltage. Reference voltage for A/D
conversion. SHDN Shut-down input. Pulling SHDN
to low shuts the MAX1241 down to 15mA supply
current. Chip Functioning - Pulling CS to low
initiates the conversion. - The serial data
stream consists of a high bit, signaling the end
of conversion (EOC), followed by the data bits
(MSB first). - End of conversion is signaled by
DOUT going high.
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Timing and Control - The CS and SCLK signals
control conversion-start and data-read
operations. - After DOUT goes high, it
transitions on the first falling edge of the SCLK
signal. The next falling clock edge shifts out
the most significant bit of the conversion result
at DOUT, followed by the remaining
bits. - Since there are 12 data bits and one
leading high bit, at least 13 clock periods are
needed to shift out a conversion
result. - Extra clock signals only shift out
trailing zeros at DOUT.
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Interfacing the MAX1241 with the 68HC11
Procedure for A/D conversion Step 1. Use a
general-purpose I/O line (SS) to pull CS low.
Keep SCLK low. Step 2. Wait for maximum
conversion time. Alternately, look for DOUT
rising edge to determine the end of
conversion. Step 3. Activate SCLK for a minimum
13 clock cycles. When interfacing with SPI, two
bytes are transferred. The first bit is a 1
followed by 12 data bits and three zeros. Step 4.
Pull CS high at or after 13th falling clock edge
(actually 16th clock edge) Step 5. With CS
high, wait for the minimum specified time, tCS,
before initiating a new conversion by pulling
CS low.
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Reading A/D Result with two SPI Transfers
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Example 11.15 Write a subroutine to perform an
A/D conversion operation for the circuit shown in
Figure 11.19 and return the result in double
accumulator D. Solution REGBAS EQU 100 DDRD EQU
09 SPCR EQU 28 SPSR EQU 29 SPDR EQU 2A CS EQU
20 value to select the CS pin DOUT EQU 04
value to select the DOUT pin get_sample PSHX PSHY
LDX REGBAS LDAA 3A STAA DDRD,X LDAA 50
STAA SPCR,X set transfer rate to 1 Mbits/s, set
master mode BCLR PORTD,X CS start an A/D
conversion BRCLR PORTD,X DOUT wait until DOUT
goes high STAA SPDR,X BRCLR SPSR,X 80 wait
until the SPI transfer is complete LDAA SPDR,X
place the upper byte of the A/D result in A
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STAB SPDR,X shift in the lower byte of the
conversion result BRCLR SPSR,X 80 wait
until SPI transfer is complete LDAB SPDR,X
place the lower byte in B BSET PORTD, X CS
prepare for the next A/D conversion LSLA
clear the bit 7 of accumulator A LSRA LSRD
place the 12-bit A/D result in the lower 12
bits of D LSRD LSRD PULY PULX RTS
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In C language, unsigned int get_sample (
) unsigned char x1 unsigned int
a2d_result DDRD 0x3A SPCR 0x50 PORTD
0xDF / start an A/D conversion / while
(!(PORTD 0x04)) / wait until conversion is
complete / SPDR 0x00 / shift in the upper
byte of the A/D result / while (!(SPSR
0x80)) / / x1 SPDR SPDR 0x00 /
shift in the lower byte / while(!(SPSR
0x80)) / / PORTD 0x20 / disable A/D
converter / a2d_result x1 256 SPDR /
combine upper and lower bytes / a2d_result
a2d_result ltlt 1 / place the A/D result in the
lower 12 bits / a2d_result a2d_result gtgt
4 / / return a2d_result