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Adaptive Memory Management

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Additional 'layer' of the memory hierarchy. ... Stanford DASH project. UPC NANOS environment. Proprietary techniques: SGI, AMD, Unisys. ... – PowerPoint PPT presentation

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Title: Adaptive Memory Management


1
  • Adaptive Memory Management
  • in
  • HPC Applications
  • Paul Slavin
  • 9 December 2004

2
The NUMA Environment
3
Scalability Sacrifices Uniformity
4
Implications for Performance
  • Additional 'layer' of the memory hierarchy.
  • A remote access incurs a greater time cost than a
    local access.
  • Memory accesses frequently constitute the largest
    execution overhead.
  • Proximity to data becomes a determinant of
    performance.
  • Poor locality severely degrades performance.

5
Existing Techniques
  • Explicit placement in code. - Programmer
    Placement - Compiler directives, e.g. OpenMP
    (Ext.)
  • Compile-time automatic optimisation.
  • OS intervention at runtime.

6
Page Migration
  • Exploits virtual memory system.
  • Reordering of arbitrary V -gt P mappings.
  • Performed in response to program behaviour.
  • Implemented by redefining TLB ...
  • ... or rewriting page table.
  • Interaction of hardware with OS or userspace.

7
Migration Illustrated (i)
8
Migration Illustrated (ii)
9
Research Community
  • Stanford DASH project.
  • UPC NANOS environment.
  • Proprietary techniques SGI, AMD, Unisys.
  • No clear consensus on page migration per se.

10
Research Avenues
  • What are the attributes of successful dynamic
    memory techniques?
  • What existing notations can best represent this
    problem?
  • - Reconfigurable task systems - Graph theory
  • How can these attributes be abstracted from the
    specifics of implementation environments?

11
Research Tools
  • Hardware-based profiling - Hardware
    counters - SpeedShop prof
  • Valgrind (x86 only)
  • Code-based profiling - Timing by system
    call - Memory permissions Unix Signals

12
Implementation
  • Improve page migration - Marginal
    gains - Difficult to implement
  • Circumvent OS allocation - Speed
    penalty? - Greatest flexibility
  • Code analysis - Compiler modification!? - Req
    uires predictable execution?

13
Architectural Awareness
  • Similar problems have proved vulnerable to
    sampling of historic performance data (E.g.
    FGDLS)
  • Can performance data be used by a program to
    create a representation of its execution
    environment?

14
Bibliography (i)
  • 1 R. P. LaRowe Jr., J. T. Wilkes, and C. S.
    Ellis. Exploiting operating system support for
    dynamic page placement on a NUMA shared memory
    multiprocessor. In Proceedings of the 3rd ACM
    SIGPLAN Symposium on Principles Practice of
    Parallel Programming, volume 26, pages 122-132,
    Williamsburg, VA, April 1991.
  • 2 Yair Bartal, Moses Charikar, and Piotr
    Indyk. On page migration and other relaxed task
    systems. Theoretical Computer Science,
    268(1)43-66, 2001.
  • 3 Jeffery Westbrook. Randomized algorithms for
    multiprocessor page migration. SIAM J. Comput.,
    23(5)951-966, 1994.
  • 4 E. T. Roush. Fast dynamic process migration.
    In Proceedings of the 16th International
    Conference on Distributed Computing Systems
    (ICDCS '96), page 637. IEEE Computer Society,
    1996.
  • 5 Dongming Jiang and Jaswinder Pal Singh. A
    methodology and an evaluation of the sgi
    origin2000. In Proceedings of the 1998 ACM
    SIGMETRICS joint international conference on
    Measurement and modeling of computer systems,
    pages 171-181. ACM Press, 1998.
  • 6 Steve Carr, Kathryn S. McKinley, and
    Chau-Wen Tseng. Compiler optimizations for
    improving data locality. In Proceedings of the
    sixth international conference on Architectural
    support for programming languages and operating
    systems, pages 252-262. ACM Press, 1994.

15
Bibliography (ii)
  • 7 Timothy Sherwood, Brad Calder, and Joel
    Emer. Reducing cache misses using hardware and
    software page placement. In Proceedings of the
    13th international conference on Supercomputing,
    pages 155-164. ACM Press, 1999.
  • 8 Brad Calder, Chandra Krintz, Simmi John, and
    Todd Austin. Cache-conscious data placement. In
    Proceedings of the eighth international
    conference on Architectural support for
    programming languages and operating systems,
    pages 139-149. ACM Press, 1998.
  • 9 Alvin R. Lebeck, Xiaobo Fan, Heng Zeng, and
    Carla Ellis. Power aware page allocation. In
    Proceedings of the ninth international conference
    on Architectural support for programming
    languages and operating systems, pages 105-116.
    ACM Press, 2000.
  • 10 Satyendra Bahadur, Viswanathan
    Kalyanakrishnan, and James Westall. An empirical
    study of the effects of careful page placement in
    linux. In Proceedings of the 36th annual
    Southeast regional conference, pages 241-250. ACM
    Press, 1998.
  • 11 Jr. Richard P. LaRowe, Mark A. Holliday, and
    Carla Schlatter Ellis. An analysis of dynamic
    page placement on a numa multiprocessor. In
    Proceedings of the 1992 ACM SIGMETRICS joint
    international conference on Measurement and
    modeling of computer systems, pages 23-34. ACM
    Press, 1992.
  • 12 Jr. R. P. LaRowe, C. S. Ellis, and M. A.
    Holliday. Evaluation of numa memory management
    through modeling and measurements. IEEE Trans.
    Parallel Distrib. Syst., 3(6)686-701, 1992.
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