PSP Project Status PSP Group

1
PSP Project StatusPSP Group

• CMC Meeting
• October 2005

2
Outline

• Implementation Issues
• Second Release
• PSP-SOI
• Personnel
• Unique features of PSP
• General observations

3
Implementation Issues

• Any model can be released in verilog-A and in
  manual C-code format. This is not what
  distinguishes one model from another. The issue
  is important but it is separate from that of the
  standard model selection
• In verilog-A the noise model is implemented with
  two internal nodes (to include correlation
  noise). C-code implementations should not include
  them
• When generating C-code whether manually or
  automatically one should take care that
  bias-independent variables are evaluated but once
  not at every bias step

4
Second Release (February 2006)

• PSP code has been stable since march.
• We plan to have one or two releases annually
• Remove S0 (set it to 0.98) if nobody uses it now
• Add VFBOV
• Add W dependence to AX scaling
• Gmin unification for QS/NQS versions
• JUNCAP2 housekeeping

5
Second Release (contd.)

• Improved scaling of substrate current
• More flexible bias dependence in saturation
• Improved documentation
• Transition from BSIM to JUNCAP2 without
  additional
• parameter extraction (CV only). For IV rough
  trends can be
• kept.

6
PSP-SOI

• The ideas regarding the model structure have been
  formulated, verified and published (CICC2005)
• This is the only third-generation SOI SPBM
  available today. It will do for SOI what PSP did
  for the bulk alternative to the
• threshold-voltage-based models
• Parameter set extending that of bulk PSP
• Prototype PSP-SOI exists and is being tested by
  ourselves and industry partners
• Beta-version will be released by June 2006 CMC
  evaluation may start soon afterwards
• Dynamic depletion version of PSP-SOI is work in
  progress.
• We can use data and insights from other CMC
  members.

7
SOI example Wide/Long
2?m/2?m ?L 40 nm
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SOI Example Wide/Short
2?m/0.1?m ?L 40 nm
9
Personnel

• Second tenure-track faculty position in the area
  of compact modeling has been formally approved by
  the College of Engineering
• New graduate student has been hired
• Hailing Wang accepted position with IBM

10
Unique Features of PSP

• Physical gate current model including accurate
  bias-dependent partitioning scheme implemented
  via symmetric linearization method
• Complete noise model correctly including velocity
  saturation effects
• Spline-collocation-based NQS model
• verified against channel segmentation, data and
  numerical simulations
• unified large-signal and small-signal
• Most complete and physical junction diode model
  (JUNCAP2)
• Bias-dependent effective doping to deal with
  retrograde profiles
• CLM in halo-doped devices
• reproduces details in long channel Gds

11
General Observations

• PSP has several unique features not available in
  any other model
• PSU group accumulated experience working with
  individual companies (LSI Logic, Freescale,
  Philips, Jazz, Xpedion, etc.) all the way from
  model implementation and personnel training to
  design libraries release and product design. We
  also have successful experience working with
  umbrella organizations like SRC
• Bulk PSP is only the first in the planned suit of
  PSP-family model
• Future and present collaboration with industry
  partners provides unprecedented depth for the PSP
  project, immediate access to the latest
  technology
• PSP-trained students represent an important
  resource for CMC members

12
FYI

• Let CMC decide on the standard model code
  requirements
• Let CMC select standard MOSFET model
• If PSP is selected it will be delivered in
  whatever format is decided by CMC
• Regardless of all this we will continue to
  deliver verilog-A code and Simkit-generated C
  code